Suivre
Behzad Zeinali
Behzad Zeinali
Apple, Swindon, United Kingdom
Adresse e-mail validée de apple.com - Page d'accueil
Titre
Citée par
Citée par
Année
Low power design for future wearable and implantable devices
K Lundager, B Zeinali, M Tohidi, JK Madsen, F Moradi
Journal of Low Power Electronics and Applications 6 (4), 20, 2016
352016
Equalization-based digital background calibration technique for pipelined ADCs
B Zeinali, T Moosazadeh, M Yavari, A Rodriguez-Vazquez
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (2), 322-333, 2013
322013
Progressive scaled STT-RAM for approximate computing in multimedia applications
B Zeinali, D Karsinos, F Moradi
IEEE Transactions on Circuits and Systems II: Express Briefs 65 (7), 938-942, 2017
312017
Ultra-fast SOT-MRAM cell with STT current for deterministic switching
B Zeinali, JK Madsen, P Raghavan, F Moradi
2017 IEEE International Conference on Computer Design (ICCD), 463-468, 2017
212017
Low‐leakage sub‐threshold 9 T‐SRAM cell in 14‐nm FinFET technology
B Zeinali, JK Madsen, P Raghavan, F Moradi
International Journal of Circuit Theory and Applications 45 (11), 1647-1659, 2017
202017
Spin-orbit-torque-based devices, circuits and architectures
F Moradi, H Farkhani, B Zeinali, H Ghanatian, JMA Pelloux-Prayer, ...
arXiv preprint arXiv:1912.01347, 2019
162019
A Reduced Store/Restore Energy MRAM-Based SRAM Cell for a Non-Volatile Dynamically Reconfigurable FPGA
L Bagheriye, S Toofan, R Saeidi, B Zeinali, F Moradi
IEEE Transactions on Circuits and Systems II: Express Briefs, 2017
142017
Sub-threshold sram design in 14 nm finfet technology with improved access time and leakage power
B Zeinali, JK Madsen, P Raghavan, F Moradi
2015 IEEE Computer Society Annual Symposium on VLSI, 74-79, 2015
142015
A novel nondestructive bit-line discharging scheme for deep submicrometer STT-RAMs
B Zeinali, JK Madsen, P Raghavan, F Moradi
IEEE Transactions on Emerging Topics in Computing 7 (2), 294-300, 2016
112016
8T-SRAM cell with Improved Read and Write Margins in 65 nm CMOS Technology
F Moradi, M Tohidi, B Zeinali, JK Madsen
VLSI-SoC: Internet of Things Foundations: 22nd IFIP WG 10.5/IEEE …, 2015
102015
Multilevel SOT-MRAM cell with a novel sensing scheme for high-density memory applications
B Zeinali, M Esmaeili, JK Madsen, F Moradi
2017 47th European Solid-State Device Research Conference (ESSDERC), 172-175, 2017
72017
Sensing of spintronic memories
B Zeinali, F Moradi
Sensing of Non-Volatile Memory Demystified, 1-30, 2019
52019
Quasi-Schottky-Barrier UTBB SOI MOSFET for low-power robust SRAMs
H Ghanatian, SE Hosseini, B Zeinali, F Moradi
IEEE Transactions on Electron Devices 64 (4), 1575-1582, 2017
42017
A new digital background correction algorithm with non-precision calibration signals for pipelined ADCs
B Zeinali, M Yavari
2011 18th IEEE International Conference on Electronics, Circuits, and …, 2011
42011
Ultra-Low Power Memory Design in Scaled Technology Nodes
B Zeinali
Department of Engineering, Aarhus University, 2017
2017
A Digital Background Calibration Method for Pipelined ADC
B Zeinali, M Yavari
2013
Digital Background Correction of Circuits Nonlinearity in Pipelined A/D Converters
B Zeinali
Amirkabir University of Technology (Tehran, 2012
2012
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