Philippe Marquet
Philippe Marquet
Verified email at univ-lille1.fr - Homepage
Title
Cited by
Cited by
Year
A model-driven design framework for massively parallel embedded systems
A Gamatiť, S Le Beux, … Piel, R Ben Atitallah, A Etien, P Marquet, ...
ACM Transactions on Embedded Computing Systems (TECS) 10 (4), 1-36, 2011
1302011
Data-parallel load balancing strategies
C Fonlupt, P Marquet, JL Dekeyser
Parallel Computing 24 (11), 1665-1684, 1998
731998
Gaspard2: from MARTE to SystemC simulation
… Piel, RB Atitallah, P Marquet, S Meftali, S Niar, A Etien, JL Dekeyser, ...
Modeling and Analyzis of Real-Time and Embedded Systems with the MARTE UML†…, 2008
592008
MDA for SoC Design, Intensive Signal Processing Experiment.
P Boulet, JL Dekeyser, C Dumoulin, P Marquet
FDL, 309-317, 2003
502003
A model driven design framework for high performance embedded systems
A Gamatiť, S Le Beux, … Piel, A Etien, RB Atitallah, P Marquet, ...
442008
Multilevel MPSoC simulation using an MDE approach
RB Atitallah, E Piel, S Niar, P Marquet, JL Dekeyser
2007 IEEE International SOC Conference, 197-200, 2007
332007
Model driven engineering for SoC co-design
J Dekeyser, P Boulet, P Marquet, S Meftali
The 3rd International IEEE-NEWCAS Conference, 2005., 21-25, 2005
322005
Repetitive Allocation Modelling with MARTE.
P Boulet, P Marquet, … Piel, J Taillard
FDL, 280-285, 2007
292007
Towards UML 2 extensions for compact modeling of regular complex topologies
A Cuccuru, JL Dekeyser, P Marquet, P Boulet
International Conference on Model Driven Engineering Languages and Systems†…, 2005
262005
GASPARD: a visual parallel programming environment
F Devin, P Boulet, JL Dekeyser, P Marquet
Proceedings. International Conference on Parallel Computing in Electrical†…, 2002
222002
Visual data-parallel programming for signal processing applications
P Boulet, JL Dekeyser, JL Levaire, P Marquet, J Soula, A Demeure
Proceedings Ninth Euromicro Workshop on Parallel and Distributed Processing†…, 2001
192001
Analysis of synchronous dynamic load balancing algorithms
JL Dekeyser, C Fonlupt, P Marquet
Parallel Computing: State-of-the Art Perspective (ParCo'95) 11, 455-462, 1995
191995
Load-balancing for a real-time system based on asymmetric multi-processing
… Piel, P Marquet, J Soula, JL Dekeyser
16th Euromicro Conference on Real-Time Systems, WIP session, Catania, Italy, 2004
172004
MpNoC design: Modeling and simulation
S Duquennoy, S Le Beux, P Marquet, S Meftali, JL Dekeyser
15th IP based SoC Design Conference, 229-232, 2006
162006
Compilation principle of a specification language dedicated to signal processing
J Soula, P Marquet, A Demeure, JL Dekeyser
International Conference on Parallel Computing Technologies, 358-370, 2001
162001
Asymmetric scheduling and load balancing for real-time on Linux SMP
… Piel, P Marquet, J Soula, JL Dekeyser
International Conference on Parallel Processing and Applied Mathematics, 896-903, 2005
142005
A design flow to map parallel applications onto FPGAs
S Le Beux, P Marquet, JL Dekeyser
2007 International Conference on Field Programmable Logic and Applications†…, 2007
132007
FPGA implementation of embedded cruise control and anti-collision radar
S Le Beux, P Marquet, O Labbani, JL Dekeyser
9th EUROMICRO Conference on Digital System Design (DSD'06), 280-287, 2006
132006
Supporting irregular and dynamic computations in data parallel languages
JL Dekeyser, P Marquet
The Data Parallel Programming Model, 197-219, 1996
131996
A model driven engineering design flow to generate VHDL
S Le Beux, P Marquet, A Honorť, JL Dekeyser
International ModEasy’07 Workshop, 2007
112007
The system can't perform the operation now. Try again later.
Articles 1–20