Jung-Hoon Chun
Jung-Hoon Chun
Professor, Sungkyunkwan University
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A 16 Gb/s/link, 64 GB/s bidirectional asymmetric memory interface
H Lee, KYK Chang, JH Chun, T Wu, Y Frans, B Leibowitz, N Nguyen, ...
IEEE Journal of Solid-State Circuits 44 (4), 1235-1247, 2009
A 16Gb/s/link, 64GB/s bidirectional asymmetric memory interface cell
K Chang, H Lee, JH Chun, T Wu, TJ Chin, K Kaviani, J Shen, X Shi, ...
2008 IEEE symposium on VLSI circuits, 126-127, 2008
Efficient Scalable Modeling of Double-Equivalent Circuit for On-Chip Spiral Inductors
YG Ahn, SK Kim, JH Chun, BS Kim
IEEE transactions on microwave theory and techniques 57 (10), 2289-2300, 2009
RF ESD protection strategies: Codesign vs. low-C protection
W Soldner, M Streibl, U Hodel, M Tiebout, H Gossner, ...
Microelectronics Reliability 47 (7), 1008-1015, 2007
ESD protection circuits for advanced CMOS technologies
JH Chun
Stanford University, 2006
A low power CMOS compatible embedded EEPROM for passive RFID tag
KS Lee, JH Chun, KW Kwon
Microelectronics Journal 41 (10), 662-668, 2010
Design and characterization of ESD protection devices for high-speed I/O in advanced SOI technology
S Cao, AA Salman, JH Chun, SG Beebe, MM Pelella, RW Dutton
IEEE transactions on electron devices 57 (3), 644-653, 2010
Advanced modeling and accurate characterization of a 16 Gb/s memory interface
WT Beyene, C Madden, JH Chun, H Lee, Y Frans, B Leibowitz, K Chang, ...
IEEE transactions on advanced packaging 32 (2), 306-327, 2009
A 4.8 Gb/s impedance-matched bidirectional multi-drop transceiver for high-capacity memory interface
WY Shin, GM Hong, H Lee, JD Han, S Kim, KS Park, DH Lim, JH Chun, ...
2011 IEEE International Solid-State Circuits Conference, 494-496, 2011
Direct TOF scanning LiDAR sensor with two-step multievent histogramming TDC and embedded interference filter
H Seo, H Yoon, D Kim, J Kim, SJ Kim, JH Chun, J Choi
IEEE Journal of Solid-State Circuits 56 (4), 1022-1035, 2021
A power-efficient voltage upconverter for embedded EEPROM application
JM Baek, JH Chun, KW Kwon
IEEE Transactions on Circuits and Systems II: Express Briefs 57 (6), 435-439, 2010
ESD design strategies for high-speed digital and RF circuits in deeply scaled silicon technologies
S Cao, JH Chun, SG Beebe, RW Dutton
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (9), 2301-2311, 2010
Clocking circuits for a 16Gb/s memory interface
T Wu, X Shi, K Kaviani, H Lee, JH Chun, TJ Chin, J Shen, R Perego, ...
2008 IEEE Custom Integrated Circuits Conference, 435-438, 2008
A 1.08-nW/kHz 13.2-ppm/ C self-biased timer using temperature-insensitive resistive current
J Jung, IH Kim, SJ Kim, Y Lee, JH Chun
IEEE Journal of Solid-State Circuits 53 (8), 2311-2318, 2018
A 5.2-Gb/s low-swing voltage-mode transmitter with an AC-/DC-coupled equalizer and a voltage offset generator
S Kim, Y Jeong, M Lee, KW Kwon, JH Chun
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (1), 213-225, 2013
Field effect diode for effective CDM ESD protection in 45 nm SOI technology
S Cao, SG Beebe, AA Salman, MM Pelella, JH Chun, RW Dutton
2009 IEEE International Reliability Physics Symposium, 594-601, 2009
A method for enhancing the sensing distance of a fingerprint sensor
KH Song, J Choi, JH Chun
Sensors 17 (10), 2280, 2017
Design of a reliable broadband I/O employing T-coil
S Kim, S Kim, G Jung, KW Kwon, JH Chun
JSTS: Journal of Semiconductor Technology and Science 9 (4), 198-204, 2009
Analysis of resistance variations and variance-aware read circuit for cross-point ReRAM
JK Park, SY Kim, JM Baek, DJ Seo, JH Chun, KW Kwon
2013 5th IEEE International Memory Workshop, 112-115, 2013
Analysis and measurement of signal distortion due to ESD protection circuits
JH Chun, B Murmann
IEEE journal of solid-state circuits 41 (10), 2354-2358, 2006
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