Jürgen Teich

Citée par

	Toutes	Depuis 2019
Citations	18401	5182
indice h	65	30
indice i10	398	149

1200

600

300

900

19981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202447 97 127 161 168 188 308 325 481 482 564 701 853 842 922 1037 1140 1080 1034 1022 1150 1017 890 1080 732 738 723

Accès public

Tout afficher

155 articles

130 articles

disponibles

non disponibles

Sur la base des exigences liées au financement

Coauteurs

Frank HannigFriedrich-Alexander-Universität Erlangen-Nürnberg (FAU)Adresse e-mail validée de cs.fau.de
Christian HaubeltProfessor of Embedded Systems, University of Rostock, GermanyAdresse e-mail validée de uni-rostock.de
Michael GlaßProfessor at Ulm UniversityAdresse e-mail validée de uni-ulm.de
Lothar ThieleProfessor of Computer Engineering, ETH ZurichAdresse e-mail validée de ethz.ch
Daniel ZienerProfessor for Computer Architecture and Embedded Systems, Technische Universität IlmenauAdresse e-mail validée de tu-ilmenau.de
Dirk KochSchool of Computer Science, University of ManchesterAdresse e-mail validée de recobus.de
Martin LukasiewyczGoogleAdresse e-mail validée de google.com
Felix ReimannAudi Electronics Venture GmbHAdresse e-mail validée de fex-it.de
Ali AhmadiniaDepartment Chair of Computer Science and Information Systems, California State Universtiy San MarcosAdresse e-mail validée de csusm.edu
Shuvra S. BhattacharyyaProfessor of Electrical and Computer Engineering, University of MarylandAdresse e-mail validée de umd.edu
Sándor P. FeketeTechnische Universität Braunschweig, L3S Research CenterAdresse e-mail validée de tu-bs.de
Andreas WeichslgartnerCARIAD SEAdresse e-mail validée de cariad.technology
Richard MembarthProfessor at the Technische Hochschule IngolstadtAdresse e-mail validée de uni-saarland.de
vahid lariUniversity of Erlangen-NurembergAdresse e-mail validée de cs.fau.de
Jörg HenkelProfessor of Computer Science, Karlsruhe Institute of TechnologyAdresse e-mail validée de kit.edu
Sascha RoloffHuawei Technologies Germany GmbHAdresse e-mail validée de huawei.com
Sebastian GrafUniversity of Erlangen-NurembergAdresse e-mail validée de cs.fau.de
Rafael RosalesIntel LabsAdresse e-mail validée de fau.de
Norbert WehnUniversity of KaiserslauternAdresse e-mail validée de eit.uni-kl.de
Marco PlatznerProfessor for Computer Engineering, Paderborn UniversityAdresse e-mail validée de upb.de

Suivre

Jürgen Teich

Full Professor, Computer Science, Friedrich-Alexander-Universität Erlangen-Nürnberg

Adresse e-mail validée de cs.fau.de

embedded systems hardware/software co-design reconfigurable computing


Titre Trier par citations Trier par année Trier par titre	Citée par Citée par	Année
Strategies for finding good local guides in multi-objective particle swarm optimization (MOPSO) S Mostaghim, J Teich Proceedings of the 2003 IEEE Swarm Intelligence Symposium. SIS'03 (Cat. No …, 2003	959	2003
Hardware/software codesign: The past, the present, and predicting the future J Teich Proceedings of the IEEE 100 (Special Centennial Issue), 1411-1430, 2012	484	2012
Pareto-front exploration with uncertain objectives J Teich International Conference on Evolutionary Multi-Criterion Optimization, 314-328, 2001	332	2001
System-level synthesis using evolutionary algorithms T Blickle, J Teich, L Thiele Design Automation for Embedded Systems 3, 23-58, 1998	316	1998
Opt4J: a modular framework for meta-heuristic optimization M Lukasiewycz, M Glaß, F Reimann, J Teich Proceedings of the 13th annual conference on Genetic and evolutionary …, 2011	312	2011
Electronic system-level synthesis methodologies A Gerstlauer, C Haubelt, AD Pimentel, TP Stefanov, DD Gajski, J Teich IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009	248	2009
SystemCoDesigner—an automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications J Keinert, M Streubūhr, T Schlichter, J Falk, J Gladigau, C Haubelt, J Teich, ... ACM Transactions on Design Automation of Electronic Systems (TODAES) 14 (1 …, 2009	245	2009
Digitale Hardware/Software-Systeme: Synthese und Optimierung J Teich, C Haubelt Springer-Verlag, 2007	240	2007
Dynoc: A dynamic infrastructure for communication in dynamically reconfugurable devices C Bobda, A Ahmadinia, M Majer, J Teich, S Fekete, J van der Veen International Conference on Field Programmable Logic and Applications, 2005 …, 2005	217	2005
Invasive computing: An overview J Teich, J Henkel, A Herkersdorf, D Schmitt-Landsiedel, ... Multiprocessor system-on-chip: hardware design and tool integration, 241-268, 2011	204	2011
ReCoBus-Builder—A novel tool and technique to build statically and dynamically reconfigurable systems for FPGAS D Koch, C Beckhoff, J Teich 2008 International conference on field programmable logic and applications …, 2008	187	2008
FlexRay schedule optimization of the static segment M Lukasiewycz, M Glaß, J Teich, P Milbredt Proceedings of the 7th IEEE/ACM international conference on Hardware …, 2009	181	2009
The role of/spl epsi/-dominance in multi objective particle swarm optimization methods S Mostaghim, J Teich The 2003 Congress on Evolutionary Computation, 2003. CEC'03. 3, 1764-1771, 2003	168	2003
Covering pareto-optimal fronts by subswarms in multi-objective particle swarm optimization S Mostaghim, J Teich Proceedings of the 2004 Congress on Evolutionary Computation (IEEE Cat. No …, 2004	164	2004
Optimal FPGA module placement with temporal precedence constraints S Fekete, E Kohler, J Teich Proceedings Design, Automation and Test in Europe. Conference and Exhibition …, 2001	161	2001
HIPA^cc: A Domain-Specific Language and Compiler for Image Processing R Membarth, O Reiche, F Hannig, J Teich, M Körner, W Eckert IEEE Transactions on Parallel and Distributed Systems 27 (1), 210-224, 2015	148	2015
CAN+: A new backward-compatible Controller Area Network (CAN) protocol with up to 16× higher data rates. T Ziermann, S Wildermann, J Teich 2009 Design, Automation & Test in Europe Conference & Exhibition, 1088-1093, 2009	143	2009
The Erlangen Slot Machine: A dynamically reconfigurable FPGA-based computer M Majer, J Teich, A Ahmadinia, C Bobda The Journal of VLSI Signal Processing Systems for Signal, Image, and Video …, 2007	142	2007
Partitioning of processor arrays: A piecewise regular approach J Teich, L Thiele Integration 14 (3), 297-332, 1993	136	1993
A SystemC-based design methodology for digital signal processing systems C Haubelt, J Falk, J Keinert, T Schlichter, M Streubühr, A Deyhle, A Hadert, ... EURASIP Journal on Embedded Systems 2007, 1-22, 2007	131	2007

Le système ne peut pas réaliser cette opération maintenant. Veuillez réessayer plus tard.

Articles 1–20

Nombre de citations par an

Citations en double

Citations fusionnées

Ajouter les coauteursCoauteurs

Suivre

Citée par

Coauteurs