Christian Pilato
Christian Pilato
Assistant Professor, Politecnico di Milano
Adresse e-mail validée de polimi.it - Page d'accueil
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A survey and evaluation of FPGA high-level synthesis tools
R Nane, VM Sima, C Pilato, J Choi, B Fort, A Canis, YT Chen, H Hsiao, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015
4672015
Ant colony heuristic for mapping and scheduling tasks and communications on heterogeneous embedded systems
F Ferrandi, PL Lanzi, C Pilato, D Sciuto, A Tumeo
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010
1802010
Bambu: A modular framework for the high level synthesis of memory-intensive applications
C Pilato, F Ferrandi
2013 23rd International Conference on Field programmable Logic and …, 2013
1332013
A multi-objective genetic algorithm for design space exploration in high-level synthesis
F Ferrandi, PL Lanzi, D Loiacono, C Pilato, D Sciuto
2008 IEEE Computer Society Annual Symposium on VLSI, 417-422, 2008
412008
Ant colony optimization for mapping and scheduling in heterogeneous multiprocessor systems
A Tumeo, C Pilato, F Ferrandi, D Sciuto, PL Lanzi
2008 International Conference on Embedded Computer Systems: Architectures …, 2008
402008
Hartes: Hardware-software codesign for heterogeneous multicore platforms
K Bertels, VM Sima, Y Yankova, G Kuzmanov, W Luk, G Coutinho, ...
IEEE micro 30 (5), 88-97, 2010
362010
An FPGA-based infrastructure for fine-grained DVFS analysis in high-performance embedded systems
P Mantovani, EG Cota, K Tien, C Pilato, G Di Guglielmo, K Shepard, ...
2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2016
342016
System-level optimization of accelerator local memory for heterogeneous systems-on-chip
C Pilato, P Mantovani, G Di Guglielmo, LP Carloni
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016
332016
Mapping and scheduling of parallel C applications with ant colony optimization onto heterogeneous reconfigurable MPSoCs
F Ferrandi, C Pilato, D Sciuto, A Tumeo
2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 799-804, 2010
332010
Securing hardware accelerators: A new challenge for high-level synthesis
C Pilato, S Garg, K Wu, R Karri, F Regazzoni
IEEE Embedded Systems Letters 10 (3), 77-80, 2017
322017
Handling large data sets for high-performance embedded applications in heterogeneous systems-on-chip
P Mantovani, EG Cota, C Pilato, G Di Guglielmo, LP Carloni
Proceedings of the International Conference on Compilers, Architectures and …, 2016
322016
A design methodology to implement memory accesses in high-level synthesis
C Pilato, F Ferrandi, D Sciuto
Proceedings of the seventh IEEE/ACM/IFIP international conference on …, 2011
312011
HW/SW methodologies for synchronization in FPGA multiprocessors
A Tumeo, C Pilato, G Palermo, F Ferrandi, D Sciuto
Proceedings of the ACM/SIGDA international symposium on Field programmable …, 2009
282009
An evolutionary approach to area-time optimization of FPGA designs
F Ferrandi, PL Lanzi, G Palermo, C Pilato, D Sciuto, A Tumeo
2007 International Conference on Embedded Computer Systems: Architectures …, 2007
282007
Ant colony optimization for mapping, scheduling and placing in reconfigurable systems
F Ferrandi, PL Lanzi, C Pilato, D Sciuto, A Tumeo
2013 NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2013), 47-54, 2013
272013
A runtime adaptive controller for supporting hardware components with variable latency
C Pilato, VG Castellana, S Lovergine, F Ferrandi
2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 153-160, 2011
272011
Improving evolutionary exploration to area-time optimization of FPGA designs
C Pilato, A Tumeo, G Palermo, F Ferrandi, PL Lanzi, D Sciuto
Journal of Systems Architecture 54 (11), 1046-1057, 2008
272008
TAO: Techniques for algorithm-level obfuscation during high-level synthesis
C Pilato, F Regazzoni, R Karri, S Garg
Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018
252018
Speeding-up expensive evaluations in high-level synthesis using solution modeling and fitness inheritance
C Pilato, D Loiacono, A Tumeo, F Ferrandi, PL Lanzi, D Sciuto
Computational intelligence in expensive optimization problems, 701-723, 2010
242010
CAD-Base: An attack vector into the electronics supply chain
K Basu, SM Saeed, C Pilato, M Ashraf, MT Nabeel, K Chakrabarty, R Karri
ACM Transactions on Design Automation of Electronic Systems (TODAES) 24 (4 …, 2019
232019
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