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A Kumar
A Kumar
Adresse e-mail validée de iitkgp.ac.in
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A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) UTB SOI MOSFETs including substrate induced surface potential effects
A Kumar, PK Tiwari
Solid-state electronics 95, 52-60, 2014
252014
A Physics-Based Threshold Voltage Model for Junction-Less Double Gate FETs Having Vertical Structural and Doping Asymmetry
A Kumar, JN Roy
IEEE Transactions on Electron Devices, 2019
82019
Subthreshold model of asymmetric GAA junctionless FETs with scaled equivalent oxide thickness
A Kumar, PK Tiwari, JN Roy
Microelectronics Journal 126, 105490, 2022
62022
Novel modification in evanescent mode analysis to incorporate sub-1 nm equivalent oxide thickness in the subthreshold model of junctionless asymmetric double gate FETs
A Kumar, JN Roy
Semiconductor Science and Technology 36 (1), 015007, 2020
12020
A review of nanoscaled bulk double gate and triple gate FETs for low standby power application
A Kumar, JN Roy
2019 3rd International Conference on Trends in Electronics and Informatics …, 2019
12019
Subthreshold Modeling of Asymmetric Multi Gate Junctionless FETs with Scaled Equivalent Oxide Thickness
A Kumar
IIT Kharagpur, 2021
2021
Modeling and simulation of subthreshold characteristics of fully-depleted recessed-source/drain UTB SOI MOSFETs including substrate induced surface potential effects
A Kumar
2014
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