| A semi-parallel successive-cancellation decoder for polar codes C Leroux, AJ Raymond, G Sarkis, WJ Gross IEEE Transactions on Signal Processing 61 (2), 289-299, 2012 | 324 | 2012 |
| Hardware architectures for successive cancellation decoding of polar codes C Leroux, I Tal, A Vardy, WJ Gross 2011 IEEE International Conference on Acoustics, Speech and Signal …, 2011 | 241 | 2011 |
| A successive cancellation decoder ASIC for a 1024-bit polar code in 180nm CMOS A Mishra, AJ Raymond, LG Amaru, G Sarkis, C Leroux, P Meinerzhagen, ... 2012 IEEE Asian solid state circuits conference (A-SSCC), 205-208, 2012 | 86 | 2012 |
| Hardware implementation of successive-cancellation decoders for polar codes C Leroux, AJ Raymond, G Sarkis, I Tal, A Vardy, WJ Gross Journal of Signal Processing Systems 69 (3), 305-315, 2012 | 85 | 2012 |
| Methods and systems for decoding polar codes W Gross, G Sarkis, A Raymond, C Leroux, I Tal, A Vardy US Patent 9,176,927, 2015 | 69 | 2015 |
| Flexible polar encoders and decoders W Gross, G Sarkis, P Giard, C Leroux US Patent 10,193,578, 2019 | 58 | 2019 |
| Multi-gb/s software decoding of polar codes B Le Gal, C Leroux, C Jego IEEE transactions on signal processing 63 (2), 349-359, 2014 | 43 | 2014 |
| High-throughput energy-efficient LDPC decoders using differential binary message passing K Cushon, S Hemati, C Leroux, S Mannor, WJ Gross IEEE Transactions on Signal Processing 62 (3), 619-631, 2013 | 38 | 2013 |
| Full-parallel architecture for turbo decoding of product codes C Jego, P Adde, C Leroux Electronics Letters 42 (18), 1052-1054, 2006 | 32 | 2006 |
| Partial sums generation architecture for successive cancellation decoding of polar codes G Berhault, C Leroux, C Jego, D Dallet SiPS 2013 Proceedings, 407-412, 2013 | 31 | 2013 |
| Low-latency software polar decoders P Giard, G Sarkis, C Leroux, C Thibeault, WJ Gross Journal of Signal Processing Systems 90 (5), 761-775, 2018 | 28 | 2018 |
| A min-sum iterative decoder based on pulsewidth message encoding K Cushon, C Leroux, S Hemati, S Mannor, WJ Gross IEEE Transactions on Circuits and Systems II: Express Briefs 57 (11), 893-897, 2010 | 25 | 2010 |
| Lowering the error floor of turbo codes with CRC verification T Tonnellier, C Leroux, B Le Gal, B Gadat, C Jego, N Van Wambeke IEEE Wireless Communications Letters 5 (4), 404-407, 2016 | 21 | 2016 |
| Stochastic chase decoding of Reed-Solomon codes C Leroux, S Hemati, S Mannor, WJ Gross IEEE Communications Letters 14 (9), 863-865, 2010 | 20 | 2010 |
| Software polar decoder on an embedded processor B Le Gal, C Leroux, C Jego 2014 IEEE Workshop on Signal Processing Systems (SiPS), 1-6, 2014 | 18 | 2014 |
| Towards Gb/s turbo decoding of product code onto an FPGA device C Leroux, C Jego, P Adde, M Jezequel 2007 IEEE International Symposium on Circuits and Systems, 909-912, 2007 | 18 | 2007 |
| An efficient, portable and generic library for successive cancellation decoding of polar codes A Cassagne, B Le Gal, C Leroux, O Aumage, D Barthou Languages and Compilers for Parallel Computing, 303-317, 2015 | 17 | 2015 |
| Beyond Gbps turbo decoder on multi-core CPUs A Cassagne, T Tonnellier, C Leroux, B Le Gal, O Aumage, D Barthou 2016 9th International Symposium on Turbo Codes and Iterative Information …, 2016 | 15 | 2016 |
| Reed-Solomon turbo product codes for optical communications: From code optimization to decoder design R Le Bidan, C Leroux, C Jego, P Adde, R Pyndiah EURASIP Journal on Wireless Communications and Networking 2008, 1-14, 2008 | 15 | 2008 |
| A flexible NISC-based LDPC decoder B Le Gal, C Jego, C Leroux IEEE transactions on signal processing 62 (10), 2469-2479, 2014 | 14 | 2014 |
