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Min Chen
Min Chen
MULTICOREWARE, INC
Verified email at multicorewareinc.com
Title
Cited by
Cited by
Year
Efficient architecture of variable size HEVC 2D-DCT for FPGA platforms
M Chen, Y Zhang, C Lu
AEU-International Journal of Electronics and Communications 73, 1-8, 2017
562017
Paralleling variable block size motion estimation of HEVC on multi-core CPU plus GPU platform
X Wang, L Song, M Chen, J Yang
2013 IEEE International Conference on Image Processing, 1836-1839, 2013
402013
Efficient realization of parallel HEVC intra encoding
Y Zhao, L Song, X Wang, M Chen, J Wang
2013 IEEE International Conference on Multimedia and Expo Workshops (ICMEW), 1-6, 2013
312013
Paralleling variable block size motion estimation of HEVC on CPU plus GPU platform
X Wang, L Song, M Chen, J Yang
2013 IEEE International Conference on Multimedia and Expo Workshops (ICMEW), 1-5, 2013
282013
Coefficient-group level modeling for low complexity RDO in HEVC
B Huang, Z Chen, Q Cai, M Chen, D Wu
2017 IEEE Visual Communications and Image Processing (VCIP), 1-4, 2017
12017
A mode dependent chroma intra smoothing algorithm for emerging HEVC standard
H Xiao, F Ye, M Chen, B Yang, A Men
2012 3rd IEEE International Conference on Network Infrastructure and Digital …, 2012
12012
Communications (AEÜ)
M Chen, Y Zhang, C Lu
2016
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