| Electromagnetic fault injection: towards a fault model on a 32-bit microcontroller N Moro, A Dehbaoui, K Heydemann, B Robisson, E Encrenaz 2013 Workshop on Fault Diagnosis and Tolerance in Cryptography, 77-88, 2013 | 213 | 2013 |
| Formal verification of a software countermeasure against instruction skip attacks N Moro, K Heydemann, E Encrenaz, B Robisson Journal of Cryptographic Engineering 4 (3), 145-156, 2014 | 106 | 2014 |
| Software countermeasures for control flow integrity of smart card C codes JF Lalande, K Heydemann, P Berthomé European Symposium on Research in Computer Security, 200-218, 2014 | 48 | 2014 |
| Topology-aware and dependence-aware scheduling and memory allocation for task-parallel languages A Drebes, K Heydemann, N Drach, A Pop, A Cohen ACM Transactions on Architecture and Code Optimization (TACO) 11 (3), 1-25, 2014 | 40 | 2014 |
| Scalable task parallelism for numa: A uniform abstraction for coordinated scheduling and memory management A Drebes, A Pop, K Heydemann, A Cohen, N Drach Proceedings of the 2016 International Conference on Parallel Architectures …, 2016 | 37 | 2016 |
| Experimental evaluation of two software countermeasures against fault attacks N Moro, K Heydemann, A Dehbaoui, B Robisson, E Encrenaz 2014 IEEE International Symposium on Hardware-Oriented Security and Trust …, 2014 | 34 | 2014 |
| Compiler-assisted loop hardening against fault attacks J Proy, K Heydemann, A Berzati, A Cohen ACM Transactions on Architecture and Code Optimization (TACO) 14 (4), 1-25, 2017 | 29 | 2017 |
| High level model of control flow attacks for smart card functional security P Berthomé, K Heydemann, X Kauffmann-Tourkestansky, JF Lalande 2012 Seventh International Conference on Availability, Reliability and …, 2012 | 29 | 2012 |
| Aftermath: A graphical tool for performance analysis and debugging of fine-grained task-parallel programs and run-time systems A Drebes, A Pop, K Heydemann, A Cohen, N Drach-Temam 7th Workshop on Programmability Issues for Heterogeneous Multicores …, 2014 | 25 | 2014 |
| Efficient design and evaluation of countermeasures against fault attacks using formal verification L Goubet, K Heydemann, E Encrenaz, RD Keulenaer International Conference on Smart Card Research and Advanced Applications …, 2015 | 21 | 2015 |
| Attack model for verification of interval security properties for smart card C codes P Berthomé, K Heydemann, X Kauffmann-Tourkestansky, JF Lalande Proceedings of the 5th ACM SIGPLAN Workshop on Programming Languages and …, 2010 | 16 | 2010 |
| Automated software protection for the masses against side-channel attacks N Belleville, D Couroussé, K Heydemann, HP Charles ACM Transactions on Architecture and Code Optimization (TACO) 15 (4), 1-27, 2018 | 15 | 2018 |
| Interactive visualization of cross-layer performance anomalies in dynamic task-parallel applications and systems A Drebes, A Pop, K Heydemann, A Cohen 2016 IEEE International Symposium on Performance Analysis of Systems and …, 2016 | 15 | 2016 |
| NUMA-aware scheduling and memory allocation for data-flow task-parallel applications A Drebes, A Pop, K Heydemann, N Drach, A Cohen Proceedings of the 21st ACM SIGPLAN Symposium on Principles and Practice of …, 2016 | 15 | 2016 |
| A first ISA-level characterization of EM pulse effects on superscalar microarchitectures: a secure software perspective J Proy, K Heydemann, A Berzati, F Majeric, A Cohen Proceedings of the 14th International Conference on Availability …, 2019 | 13 | 2019 |
| Formal verification of a software countermeasure against instruction skip attacks. K Heydemann, N Moro, E Encrenaz, B Robisson IACR Cryptol. ePrint Arch. 2013, 679, 2013 | 13 | 2013 |
| Language-centric performance analysis of openmp programs with aftermath A Drebes, JB Bréjon, A Pop, K Heydemann, A Cohen International Workshop on OpenMP, 237-250, 2016 | 12 | 2016 |
| Iterative compilation for two antagonistic criteria: Application to code size and performance K Heydemann, F Bodin Proceedings of the 4th Workshop on Optimizations for DSP and Embedded …, 2006 | 12 | 2006 |
| Symbolic approach for side-channel resistance analysis of masked assembly codes IB El Ouahma, QL Meunier, K Heydemann, E Encrenaz Security Proofs for Embedded Systems, 2017 | 11 | 2017 |
| UFS: a global trade‐off strategy for loop unrolling for VLIW architectures K Heydemann, F Bodin, PMW Knijnenburg, L Morin Concurrency and Computation: Practice and Experience 18 (11), 1413-1434, 2006 | 11 | 2006 |
emmanuelle encrenazassociate professor of computer science, University Pierre and Marie CurieAdresse e-mail validée de lip6.fr
