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| Neural network compute tile O Temam, R Narayanaswami, H Khaitan, DH Woo US Patent 9,710,265, 2017 | 79 | 2017 |
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| Neural network accelerator with parameters resident on chip O Temam, H Khaitan, R Narayanaswami, DH Woo US Patent 10,504,022, 2019 | 43 | 2019 |
| Neural network instruction set architecture R Narayanaswami, DH Woo, O Temam, H Khaitan US Patent 11,379,707, 2022 | 38 | 2022 |
| Neural network compute tile O Temam, R Narayanaswami, H Khaitan, DH Woo US Patent 10,175,980, 2019 | 33 | 2019 |
| Neural network instruction set architecture R Narayanaswami, DH Woo, O Temam, H Khaitan US Patent 9,959,498, 2018 | 27 | 2018 |
| Virtualizing external memory as local to a machine learning accelerator LJ Madar III, T Fadelu, H Khaitan, R Narayanaswami US Patent 11,176,493, 2021 | 23 | 2021 |
| Accessing data in multi-dimensional tensors using adders O Temam, H Khaitan, R Narayanaswami, DH Woo US Patent 10,534,607, 2020 | 13 | 2020 |
| Neural network compute tile O Temam, R Narayanaswami, H Khaitan, DH Woo US Patent 11,422,801, 2022 | 11 | 2022 |
| Alternative loop limits for accessing data in multi-dimensional tensors O Temam, H Khaitan, R Narayanaswami, DH Woo US Patent 10,248,908, 2019 | 8 | 2019 |
| Accessing data in multi-dimensional tensors using adders O Temam, H Khaitan, R Narayanaswami, DH Woo US Patent 9,946,539, 2018 | 7 | 2018 |
| Neural network weight distribution using a tree direct-memory access (dma) bus H Khaitan US Patent App. 17/030,051, 2022 | 6 | 2022 |
| Accessing prologue and epilogue data O Temam, H Khaitan, R Narayanaswami, DH Woo US Patent 10,802,956, 2020 | 6 | 2020 |
| Hardware double buffering using a special purpose computational unit O Temam, H Khaitan, R Narayanaswami, DH Woo US Patent 10,496,326, 2019 | 6 | 2019 |
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| Alternative loop limits for accessing data in multi-dimensional tensors O Temam, H Khaitan, R Narayanaswami, DH Woo US Patent 10,885,434, 2021 | 5 | 2021 |
| Hardware double buffering using a special purpose computational unit O Temam, H Khaitan, R Narayanaswami, DH Woo US Patent 10,175,912, 2019 | 2 | 2019 |
| Accessing prologue and epilogue data O Temam, H Khaitan, R Narayanaswami, DH Woo US Patent 10,108,538, 2018 | 2 | 2018 |
| Neural network compute tile O Temam, R Narayanaswami, H Khaitan, DH Woo US Patent 11,816,480, 2023 | 1 | 2023 |
