A novel hardware logic encryption technique for thwarting illegal overproduction and hardware trojans S Dupuis, PS Ba, G Di Natale, ML Flottes, B Rouzeyre IEEE InternationalOn-Line Testing Symposium (IOLTS), 49-54, 2014 | 277 | 2014 |
Logic locking: A survey of proposed methods and evaluation metrics S Dupuis, ML Flottes Journal of Electronic Testing 35, 273-291, 2019 | 59 | 2019 |
Secure JTAG implementation using Schnorr protocol A Das, J Da Rolt, S Ghosh, S Seys, S Dupuis, G Di Natale, ML Flottes, ... Journal of Electronic Testing 29, 193-209, 2013 | 55 | 2013 |
Protection against hardware trojans with logic testing: Proposed solutions and challenges ahead S Dupuis, ML Flottes, G Di Natale, B Rouzeyre IEEE Design & Test 35 (2), 73-90, 2017 | 48 | 2017 |
New testing procedure for finding insertion sites of stealthy hardware trojans S Dupuis, PS Ba, ML Flottes, G Di Natale, B Rouzeyre Design, Automation & Test in Europe Conference & Exhibition (DATE), 776-781, 2015 | 39 | 2015 |
Hardware Trust through Layout Filling: a Hardware Trojan Prevention Technique PS Ba, S Dupuis, M Palanichamy, G Di Natale, B Rouzeyre IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 254-259, 2016 | 36 | 2016 |
On the limitations of logic testing for detecting hardware Trojans horses ML Flottes, S Dupuis, PS Ba, B Rouzeyre International Conference on Design & Technology of Integrated Systems in …, 2015 | 31 | 2015 |
Hardware trojan prevention using layout-level design approach PS Ba, M Palanichamy, S Dupuis, ML Flottes, G Di Natale, B Rouzeyre European Conference on Circuit Theory and Design (ECCTD), 1-4, 2015 | 26 | 2015 |
A novel hardware logic encryption technique for thwarting illegal overproduction and hardware trojans. In 2014 IEEE 20th International On-Line Testing Symposium (IOLTS) S Dupuis, PS Ba, G Di Natale, ML Flottes, B Rouzeyre IEEE, 2014 | 23 | 2014 |
Identification of Hardware Trojans triggering signals S Dupuis, G Di Natale, ML Flottes, B Rouzeyre First Workshop on Trustworthy Manufacturing and Utilization of Secure …, 2013 | 23* | 2013 |
A New Secure Stream Cipher for Scan Chain Encryption M Da Silva, E Valea, ML Flottes, S Dupuis, G Di Natale, B Rouzeyre IEEE International Verification and Security Workshop (IVSW), 68-73, 2018 | 21 | 2018 |
Is side-channel analysis really reliable for detecting hardware Trojans? G Di Natale, S Dupuis, B Rouzeyre Conference on Design of Circuits and Integrated Systems (DCIS), 238-242, 2012 | 18 | 2012 |
Stratus: A procedural circuit description language based upon Python S Belloeil, D Dupuis, C Masson, JP Chaput, H Mehrez International Conference on Microelectronics (ICM), 261-264, 2007 | 17 | 2007 |
Providing confidentiality and integrity in ultra low power iot devices E Valea, M Da Silva, ML Flottes, G Di Natale, S Dupuis, B Rouzeyre 2019 14th International Conference on Design & Technology of Integrated …, 2019 | 16 | 2019 |
SI ECCS: SECure context saving for IoT devices E Valea, M Da Silva, G Di Natale, ML Flottes, S Dupuis, B Rouzeyre International Conference on Design & Technology of Integrated Systems In …, 2018 | 15 | 2018 |
On the effectiveness of hardware trojan horse detection via side-channel analysis S Dupuis, G Di Natale, ML Flottes, B Rouzeyre Information Security Journal: A Global Perspective 22 (5-6), 226-236, 2013 | 15 | 2013 |
A secure scan controller for protecting logic locking QL Nguyen, E Valea, ML Flottes, S Dupuis, B Rouzeyre 2020 IEEE 26th International Symposium on On-Line Testing and Robust System …, 2020 | 11 | 2020 |
Using outliers to detect stealthy hardware trojan triggering? PS Ba, S Dupuis, ML Flottes, G Di Natale, B Rouzeyre IEEE International Verification and Security Workshop (IVSW), 1-6, 2016 | 10 | 2016 |
A Comprehensive Approach to a Trusted Test Infrastructure M Merandat, V Reynaud, E Valea, J Quevremont, N Valette, P Maistri, ... 2019 IEEE 4th International Verification and Security Workshop (IVSW), 43-48, 2019 | 8 | 2019 |
A Novel Use of Approximate Circuits to Thwart Hardware Trojan Insertion and Provide Obfuscation H Martin, L Entrena, S Dupuis, G Di Natale IEEE International Symposium on On-Line Testing And Robust System Design …, 2018 | 7 | 2018 |