Alberto Sangiovanni Vincentelli - Google Scholar Citations

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Co-authors

Luciano LavagnoPolitecnico di TorinoVerified email at polito.it
Tiziano VillaProfessore d'informatica, Universita' di VeronaVerified email at univr.it
Luca CarloniProfessor of Computer Science, Columbia UniversityVerified email at cs.columbia.edu
Roberto PasseroneUniversity of TrentoVerified email at unitn.it
Maria Domenica Di BenedettoProfessor, University of L'Aquila, ItalyVerified email at univaq.it
Marco Di NataleFull Professor, TECIP Institute, Scuola Superiore S. AnnaVerified email at sssup.it
Pierluigi NuzzoViterbi School of Engineering, University of Southern CaliforniaVerified email at usc.edu
Edoardo CharbonProfessor of Advanced Quantum Architectures, EPFLVerified email at epfl.ch
Paolo GiustoGeneral MotorsVerified email at gm.com
Jan RabaeyProfessor of EECS, University of California at BerkeleyVerified email at eecs.berkeley.edu
Edward A. LEEProfessor of Electrical Engineering and Computer Sciences, University of California at BerkeleyVerified email at berkeley.edu
Sanjit A. SeshiaUniversity of California, BerkeleyVerified email at eecs.berkeley.edu
Sunil KhatriTexas A&M UniversityVerified email at tamu.edu
Luca BenvenutiSapienza Università di RomaVerified email at uniroma1.it
Alessandro PintoUnited Technologies Research Center, Inc.Verified email at utrc.utc.com
Mehdi MaasoumyPhD, University of California, BerkeleyVerified email at berkeley.edu
Qi ZhuAssociate Professor of Electrical Engineering and Computer ScienceVerified email at northwestern.edu
Timothy Yee-Kwong KamIntelVerified email at intel.com
Alper DemirProfessor of Electrical Engineering, Koc University, TurkeyVerified email at ku.edu.tr
Haibo ZengElectrical & Computer Engineering, Virginia TechVerified email at vt.edu

Alberto Sangiovanni Vincentelli

Professor of EECS, University of California, Berkeley

Verified email at eecs.berkeley.edu - Homepage

System design embedded systems design automation verification synthesis


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Logic minimization algorithms for VLSI synthesis RK Brayton Springer, 1984	2147	1984
SIS: A system for sequential circuit synthesis EM Sentovich, KJ Singh, L Lavagno, C Moon, R Murgai, A Saldanha, ...	2099	1992
MIS: A multiple-level logic optimization system RK Brayton, R Rudell, A Sangiovanni-Vincentelli, AR Wang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1987	1458	1987
System-level design: orthogonalization of concerns and platform-based design K Keutzer, AR Newton, JM Rabaey, A Sangiovanni-Vincentelli IEEE transactions on computer-aided design of integrated circuits and …, 2000	1210	2000
Hardware-software co-design of embedded systems: the POLIS approach F Balarin, P Giusto, A Jurecska, M Chiodo, C Passerone, E Sentovich, ... Springer Science & Business Media, 1997	1053	1997
Handbook of sensor networks: compact wireless and wired sensing systems M Ilyas, I Mahgoub CRC press, 2004	986	2004
VIS: A system for verification and synthesis RK Brayton, GD Hachtel, A Sangiovanni-Vincentelli, F Somenzi, A Aziz, ... International conference on computer aided verification, 428-432, 1996	921	1996
The waveform relaxation method for time-domain analysis of large scale integrated circuits E Lelarasmee, AE Ruehli, AL Sangiovanni-Vincentelli IEEE transactions on computer-aided design of integrated circuits and …, 1982	895	1982
A framework for comparing models of computation EA Lee, A Sangiovanni-Vincentelli IEEE Transactions on computer-aided design of integrated circuits and …, 1998	858	1998
Design of embedded systems: Formal models, validation, and synthesis S Edwards, L Lavagno, EA Lee, A Sangiovanni-Vincentelli Proceedings of the IEEE 85 (3), 366-390, 1997	727	1997
Modeling cyber–physical systems P Derler, EA Lee, AS Vincentelli Proceedings of the IEEE 100 (1), 13-28, 2011	689	2011
The TimberWolf placement and routing package C Sechen, A Sangiovanni-Vincentelli IEEE Journal of Solid-State Circuits 20 (2), 510-522, 1985	675	1985
Logic verification using binary decision diagrams in a logic synthesis environment S Malik, AR Wang, RK Brayton, A Sangiovanni-Vincentelli [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89 …, 1988	672	1988
Sequential circuit design using synthesis and optimization EM Sentovich, KJ Singh, C Moon, H Savoj, RK Brayton, ... Proceedings 1992 IEEE International Conference on Computer Design: VLSI in …, 1992	640	1992
Metropolis: An integrated electronic system design environment F Balarin, Y Watanabe, H Hsieh, L Lavagno, C Passerone, ... Computer 36 (4), 45-52, 2003	628	2003
Convergence and finite-time behavior of simulated annealing D Mitra, F Romeo, A Sangiovanni-Vincentelli Advances in applied probability 18 (3), 747-771, 1986	607	1986
Steady-state methods for simulating analog and microwave circuits KS Kundert, JK White, AL Sangiovanni-Vincentelli Springer Science & Business Media, 2013	573	2013
Implicit state enumeration of finite state machines using BDD HJ Touati, H Savoj, B Lin, RK Brayton, A Sangiovanni-Vincentelli 1990 IEEE International Conference on Computer-Aided Design, 130-133, 1990	536	1990
Platform-based design and software design methodology for embedded systems A Sangiovanni-Vincentelli, G Martin IEEE Design & Test of Computers 18 (6), 23-33, 2001	535	2001
Multilevel logic synthesis RK Brayton, GD Hachtel, AL Sangiovanni-Vincentelli Proceedings of the IEEE 78 (2), 264-300, 1990	533	1990

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