| OCEANS: Optimizing compilers for embedded applications B Aarts, M Barreteau, F Bodin, P Brinkhaus, Z Chamski, HP Charles, ... Euro-Par'97 Parallel Processing: Third International Euro-Par Conference …, 1997 | 45 | 1997 |
| An innovative compilation tool-chain for embedded multi-core architectures M Torquati, M Vanneschi, M Amini, S Guelton, R Keryell, V Lanore, ... Embedded World Conference (February 2012), 2012 | 20 | 2012 |
| Repetitive model refactoring strategy for the design space exploration of intensive signal processing applications C Glitia, P Boulet, E Lenormand, M Barreteau Journal of Systems Architecture 57 (9), 815-829, 2011 | 18 | 2011 |
| OCEANS-Optimising Compilers for Embedded Applications⋆ M Barreteau, F Bodin, Z Chamski, HP Charles, C Eisenbeis, J Gurd, ... Euro-Par’99 Parallel Processing: 5th International Euro-Par Conference …, 1999 | 14 | 1999 |
| OCEANS: Optimising compilers for embedded applications M Barreteau, F Bodin, P Brinkhaus, Z Chamski, HP Charles, C Eisenbeis, ... Euro-Par’98 Parallel Processing: 4th International Euro-Par Conference …, 1998 | 13 | 1998 |
| Automatic mapping of scans and reductions M Barreteau, P Feautrier High Performance Computing Symposium 95, 15, 1995 | 8 | 1995 |
| Method for optimizing the size of a data subset of a processing space for improved execution performance R Barrere, P Brelet, M Barreteau, E Lenormand US Patent 10,120,717, 2018 | 5 | 2018 |
| A case study of design space exploration for embedded multimedia applications on SoCs I Hurbain, C Ancourt, F Irigoin, M Barreteau, N Museux, F Pasquier Seventeenth IEEE International Workshop on Rapid System Prototyping (RSP'06 …, 2006 | 5 | 2006 |
| Efficient mapping of interdependent scans M Barreteau, P Feautrier Euro-Par'96 Parallel Processing: Second International Euro-Par Conference …, 1996 | 5* | 1996 |
| The interplay of expansion and scheduling in paf P Feautrier, JF Collard, M Barreteau, D Barthou, A Cohen, V Lefebvre Technical Report 1998/6, PRiSM, U. of Versailles, 1988 | 5 | 1988 |
| Repetitive Model Refactoring for Design Space Exploration of Intensive Signal Processing Applications C Glitia, P Boulet, E Lenormand, M Barreteau | 4 | 2009 |
| PROMPT: a mapping environment for telecom applications on “system-on-a-chip” M Barreteau, J Mattioli, T Grandpierre, C Lavarenne, Y Sorel, P Bonnot, ... Proceedings of the 2000 international conference on Compilers, architecture …, 2000 | 4 | 2000 |
| SpearDE–a code generation environment for custom parallel embedded architectures E Lenormand, R Barrere, T Petrisor, M Barreteau | 2 | |
| SpearDE: Plateforme de développement de chaînes de parallélisation sur architectures distribuées hétérogènes T Petrisor, E Lenormand, R Barrere, M Barreteau | 2 | |
| IA de confiance: condition nécessaire pour le déploiement de l'IA dans les systèmes critiques J Mattioli, F Terrier, L Cantat, R Gelin, J Chiaroni, Y Bonhomme, ... APIA2021-Conférence Nationale sur les Applications Pratiques de l …, 2021 | 1 | 2021 |
| Signal Processing: Radar M Barreteau, C Cantini Smart Multicore Embedded Systems, 125-138, 2013 | 1 | 2013 |
| PROMPT: Placement Rapide Optimisé sur Machines Parallèles pour applications Télécoms M Barreteau, J Jourdan, J Mattioli, C Ancourt, F Irigoin, T Grandpierre, ... Workshop AAA sur l’adéquation algorithme architecture, 59-64, 2000 | 1 | 2000 |
| Trustworthy AI: a necessary condition for AI based defense system deployment J Mattioli, F Terrier, L Cantat, J Chiaroni, M Barreteau, Y Bonhomme, ... APIA (Conférence Nationale sur les Applications Pratiques de l’Intelligence …, 2021 | | 2021 |
| Repetitive Model Refactoring for Design Space Exploration of Intensive Signal Processing Applications CGPBE Lenormand, M Barreteau | | 2009 |
| Elementary transformation analysis for Array-OL O Labbani, P Feautrier, E Lenormand, M Barreteau 2009 IEEE/ACS International Conference on Computer Systems and Applications …, 2009 | | 2009 |
Henri-Pierre CharlesCEAAdresse e-mail validée de cea.fr
