Belgacem BEN HEDIA
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Formal evaluation of quality of service for data acquisition systems
B Ben Hedia, F Jumel, JP Babau, CI Lyon-CPE
Proc. of FDL 5, 2005
19*2005
Specifying and Verifying Concurrent C Programs with TLA+
A Methni, M Lemerre, B Ben Hedia, S Haddad, K Barkaoui
Formal Techniques for Safety-Critical Systems, 206-222, 2014
102014
Formal Executable Models for Automatic Detection of Timing Anomalies
M Asavoae, B Ben Hedia, M Jan
18th International Workshop on Worst-Case Execution Time Analysis (WCET 2018), 2018
82018
Towards time-triggered component-based system models
H Guesmi, BB Hedia, S Bliudze, S Bensalem, J Combaz
82015
Formal modelling framework of data acquisition modules using a synchronous approach for timing analysis
L Morel, JP Babau, B Ben Hedia
WRTP/RTS 1, 2009
42009
Experiences and reflections on three years of CPS summer schools within EIT digital
D Cancila, V Nuzzo, M Stoycheva, W Birk, F Asplund, M Torngren
Proceedings of the 2016 Workshop on Embedded and Cyber-Physical Systems …, 2016
32016
State space reduction strategies for model checking concurrent C programs
A Methni, BB Hedia, M Lemerre, S Haddad, K Barkaoui
9th Workshop on Verification and Evaluation of Computer and Communication …, 2015
32015
Towards Correct Transformation: From High-Level Models to Time-Triggered Implementations
H Guesmi, BB Hedia, S Bliudze, M Jan, S Bensalem
RTAS, 13, 2016
22016
Externalisation of Time-Triggered communication system in BIP high level models
H Guesmi, B Ben Hedia, S Bliudze, S Bensalem
JRWRTC 2014, 41, 2014
22014
Towards Formal Co-validation of Hardware and Software Timing Models of CPSs
M Asavoae, I Haur, M Jan, BB Hedia, M Schoeberl
Cyber Physical Systems. Model-Based Design, 203-227, 2019
12019
QuaRTOS-DSE: A Tool for Design Space Exploration of Embedded Real-Time System
B Le Nabec, BB Hedia, JP Babau
2018 IEEE 21st International Symposium on Real-Time Distributed Computing …, 2018
12018
Verifying and Constructing Abstract TLA Specifications: Application to the Verification of C programs
A Methni, M Lemerre, BB Hedia, S Haddad, K Barkaoui
12015
ANALYSE TEMPORELLE DES SYS-TÈMES D’ACQUISITION DE DONNÉES: UNE APPROCHE À BASE D’AUTO-MATES TEMPORISÉS COMMUNICANTS ET D’OBSERVATEURS
B BEN HEDIA
INSA-LYON, 2008
12008
Scalable Detection of Amplification Timing Anomalies for the Superscalar TriCore Architecture
B Binder, M Asavoae, F Brandner, BB Hedia, M Jan
International Conference on Formal Methods for Industrial Critical Systems …, 2020
2020
TT-BIP: using correct-by-design BIP approach for modelling real-time system with time-triggered paradigm
H Guesmi, B Ben Hedia, S Bliudze, S Bensalem, B Lenabec
Innovations in Systems and Software Engineering 14 (2), 117-142, 2018
2018
From timed component-based systems to time-triggered implementations: a correct-by-design approach
H Guesmi
Université Grenoble Alpes, 2017
2017
TT-BIP: Using Correct-by-Design BIP Approach for Modelling Real-Time System with Time-Triggered Paradigm
H Guesmi, B Ben Hedia, S Bliudze, S Bensalem, B Le Nabec
International Conference on Verification and Evaluation of Computer and …, 2017
2017
Model-compilation challenges for cyber-physical systems
B Ben Hedia, C Mraidha, E Hamelin, S Tucci-Piergiovanni
Enhanced Living Environments: From Models to Technologies 10, 269, 2017
2017
Towards an Ultra-lightweight Cryptosystem for IoT
T Omrani, L Sliman, R Becheikh, S Belghith, B Ben Hedia
International Conference on Soft Computing and Pattern Recognition, 614-621, 2016
2016
Modeling legacy code with BIP: how to reduce the gap between formal description and real-time implementation
B Le Nabec, BB Hedia, JP Babau, M Jan, H Guesmi
2016 Forum on Specification and Design Languages (FDL), 1-8, 2016
2016
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