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Robert Aitken
Robert Aitken
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Cited by
Year
Low power methodology manual: for system-on-chip design
D Flynn, R Aitken, A Gibbons, K Shi
Springer Science & Business Media, 2007
8292007
The effect of different test sets on quality level prediction: When is 80% better than 90%?
PC Maxwell, RC Aitken, V Johansen, I Chiang
1991, Proceedings. International Test Conference, 358, 1991
2151991
Impact of technology and voltage scaling on the soft error susceptibility in nanoscale CMOS
V Chandra, R Aitken
2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI …, 2008
1962008
Biased voting: A method for simulating CMOS bridging faults in the presence of variable gate logic thresholds
PC Maxwell, RC Aitken
Proceedings of IEEE International Test Conference-(ITC), 63-72, 1993
1951993
IDDQ and AC scan: The war against unmodelled defects
PC Maxwell, RC Aitken, KR Kollitz, AC Brown
Proceedings International Test Conference 1996. Test and Design Validity …, 1996
1851996
The effectiveness of IDDQ, functional and scan tests: how many fault coverages do we need?
PC Maxwell, RC Aitken, V Johansen, I Chiang
Proceedings of the IEEE International Test Conference on Discover the New …, 1992
1631992
TIMBER: Time borrowing and error relaying for online timing error resilience
M Choudhury, V Chandra, K Mohanram, R Aitken
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
1192010
Nanometer technology effects on fault models for IC testing
RC Aitken
Computer 32 (11), 46-51, 1999
1101999
Modular embedded test system for use in integrated circuits
F Muradali, RC Aitken
US Patent 6,191,603, 2001
1092001
Fault location with current monitoring
RC Aitken
1991, Proceedings. International Test Conference, 623, 1991
971991
Programmable current for correlated electron switch
BS Sandhu, GMN Lattimore, RC Aitken
US Patent 9,748,943, 2017
902017
Method, system and device for complementary non-volatile memory device operation
A Bhavnagarwala, RC Aitken, L Shifren
US Patent 9,589,636, 2017
902017
Programmable voltage reference
BS Sandhu, GMN Lattimore, RC Aitken
US Patent 9,851,738, 2017
892017
Finding defects with fault models
RC Aitken
Proceedings of 1995 IEEE International Test Conference (ITC), 498-505, 1995
851995
A comparison of defect models for fault location with IDDQ measurements
RC Aitken
Proceedings of IEEE International Test Conference-(ITC), 1051-1060, 1993
851993
IDDQ Testing as a Component of a Test Suite: The Need for Several Fault Coverage Metrics
PC Maxwell, RC Aitken
IDDQ Testing of VLSI Circuits, 19-30, 1992
821992
A diagnosis method using pseudo-random vectors without intermediate signatures
RC Aitken, VK Agarwal
1989 IEEE International Conference on Computer-Aided Design, 574,575,576,577 …, 1989
821989
Method, system and device for non-volatile memory device operation
RC Aitken, L Shifren
US Patent 9,558,819, 2017
792017
Workload dependent NBTI and PBTI analysis for a sub-45nm commercial microprocessor
E Mintarno, V Chandra, D Pietromonaco, R Aitken, RW Dutton
2013 IEEE International Reliability Physics Symposium (IRPS), 3A. 1.1-3A. 1.6, 2013
772013
On the efficacy of write-assist techniques in low voltage nanoscale SRAMs
V Chandra, C Pietrzyk, R Aitken
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
772010
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