Luca Frontini
Luca Frontini
INFN Milano
Adresse e-mail validée de mi.infn.it
TitreCitée parAnnée
A new XOR-based Content Addressable Memory architecture
L Frontini, S Shojaii, A Stabile, V Liberali
2012 19th IEEE International Conference on Electronics, Circuits, and …, 2012
312012
AM06: the Associative Memory chip for the Fast TracKer in the upgraded ATLAS detector
A Annovi, MM Beretta, G Calderini, F Crescioli, L Frontini, V Liberali, ...
Journal of Instrumentation 12 (04), C04013, 2017
252017
Logic synthesis and testing techniques for switching nano-crossbar arrays
D Alexandrescu, M Altun, L Anghel, A Bernasconi, V Ciriani, L Frontini, ...
Microprocessors and Microsystems 54, 14-25, 2017
122017
Synthesis on switching lattices of dimension-reducible boolean functions
A Bernasconi, V Ciriani, L Frontini, G Trucco
2016 IFIP/IEEE International Conference on Very Large Scale Integration …, 2016
112016
Logic synthesis for switching lattices by decomposition with p-circuits
A Bernasconi, V Ciriani, L Frontini, V Liberali, G Trucco, T Villa
2016 Euromicro Conference on Digital System Design (DSD), 423-430, 2016
112016
Composition of switching lattices and autosymmetric boolean function synthesis
A Bernasconi, V Ciriani, L Frontini, G Trucco
2017 Euromicro Conference on Digital System Design (DSD), 137-144, 2017
62017
Synthesis and Performance Optimization of a Switching Nano-crossbar Computer
D Alexandrescu, M Altun, L Anghel, A Bernasconi, V Ciriani, L Frontini, ...
62016
A XOR-based associative memory block in 28 nm CMOS for interdisciplinary applications
A Annovi, A Baschirotto, MM Beretta, NV Biesuz, S Citraro, F Crescioli, ...
2015 IEEE International Conference on Electronics, Circuits, and Systems …, 2015
62015
Composition of switching lattices for regular and for decomposed functions
A Bernasconi, V Ciriani, L Frontini, G Trucco
Microprocessors and Microsystems 60, 207-218, 2018
52018
Enhancing logic synthesis of switching lattices by generalized Shannon decomposition methods
A Bernasconi, V Ciriani, L Frontini, V Liberali, G Trucco, T Villa
Microprocessors and Microsystems 56, 193-203, 2018
52018
A low-power and high-density Associative Memory in 28 nm CMOS technology
A Annovi, G Calderini, F Crescioli, F De Canio, L Frontini, T Kubota, ...
2017 6th International Conference on Modern Circuits and Systems …, 2017
52017
Characterization of an Associative Memory chip in 28 nm CMOS technology
A Annovi, G Calderini, S Capra, B Checcucci, F Crescioli, F De Canio, ...
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
42018
Radiation-tolerant standard cell synthesis using double-rail redundant approach
V Ciriani, L Frontini, V Liberali, S Shojaii, A Stabile, G Trucco
2014 21st IEEE International Conference on Electronics, Circuits and Systems …, 2014
42014
Integrated Synthesis Methodology for Crossbar Arrays
MC Morgul, O Tunali, M Altun, L Frontini, V Ciriani, EI Vatajelu, L Anghel, ...
Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale …, 2018
32018
Design and Characterization of New Content Addressable Memory Cells
A Annovi, L Frontini, V Liberali, A Stabile
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
22018
A very compact population count circuit for associative memories
L Frontini, V Liberali, A Stabile
2018 7th International Conference on Modern Circuits and Systems …, 2018
22018
Development of a large pixel chip demonstrator in RD53 for ATLAS and CMS upgrades
E Conti, P Pangaud, P Breugnon, M Menichelli, G De Robertis, S Orfanelli, ...
PoS, 005, 2017
22017
Fault Mitigation of Switching Lattices under the Stuck-At-Fault Model
L Anghel, A Bernasconi, V Ciriani, L Frontini, G Trucco, I Vatajelu
2019 IEEE Latin American Test Symposium (LATS), 1-6, 2019
12019
An associative memory chip for the trigger system of the ATLAS experiment
RS Shojaii
PoS, 058, 2017
12017
Power distribution network optimization for associative memories
L Frontini, A Stabile, V Liberali
2017 6th International Conference on Modern Circuits and Systems …, 2017
12017
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