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Luca Frontini
Luca Frontini
Adresse e-mail validée de unimi.it
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A new XOR-based Content Addressable Memory architecture
L Frontini, S Shojaii, A Stabile, V Liberali
2012 19th IEEE International Conference on Electronics, Circuits, and …, 2012
412012
Test results and prospects for RD53A, a large scale 65 nm CMOS chip for pixel readout at the HL-LHC
L Gaioni, RD53 Collaboration
Nuclear Instruments and Methods in Physics Research Section A: Accelerators …, 2019
342019
AM06: the Associative Memory chip for the Fast TracKer in the upgraded ATLAS detector
A Annovi, MM Beretta, G Calderini, F Crescioli, L Frontini, V Liberali, ...
Journal of Instrumentation 12 (04), C04013, 2017
332017
Logic synthesis and testing techniques for switching nano-crossbar arrays
D Alexandrescu, M Altun, L Anghel, A Bernasconi, V Ciriani, L Frontini, ...
Microprocessors and Microsystems 54, 14-25, 2017
202017
Synthesis on switching lattices of dimension-reducible boolean functions
A Bernasconi, V Ciriani, L Frontini, G Trucco
2016 IFIP/IEEE International Conference on Very Large Scale Integration …, 2016
202016
Logic synthesis for switching lattices by decomposition with p-circuits
A Bernasconi, V Ciriani, L Frontini, V Liberali, G Trucco, T Villa
2016 Euromicro Conference on Digital System Design (DSD), 423-430, 2016
202016
Composition of switching lattices for regular and for decomposed functions
A Bernasconi, V Ciriani, L Frontini, G Trucco
Microprocessors and Microsystems 60, 207-218, 2018
152018
Characterization of an associative memory chip in 28 nm CMOS technology
A Annovi, G Calderini, S Capra, B Checcucci, F Crescioli, F De Canio, ...
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
112018
Composition of switching lattices and autosymmetric boolean function synthesis
A Bernasconi, V Ciriani, L Frontini, G Trucco
2017 Euromicro Conference on Digital System Design (DSD), 137-144, 2017
112017
First measurements on the Timespot1 ASIC: a fast-timing, high-rate pixel-matrix front-end
L Piccolo, S Cadeddu, L Frontini, A Lai, V Liberali, A Rivetti, A Stabile
Journal of Instrumentation 17 (03), C03022, 2022
102022
A low-power and high-density Associative Memory in 28 nm CMOS technology
A Annovi, G Calderini, F Crescioli, F De Canio, L Frontini, T Kubota, ...
2017 6th International Conference on Modern Circuits and Systems …, 2017
92017
Integrated synthesis methodology for crossbar arrays
MC Morgul, O Tunali, M Altun, L Frontini, V Ciriani, EI Vatajelu, L Anghel, ...
Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale …, 2018
82018
RD53A: a large scale prototype for HL-LHC silicon pixel detector phase 2 upgrades
E Monteil, M Barbero, D Fougeron, S Godiot, M Menouni, P Pangaud, ...
POS PROCEEDINGS OF SCIENCE 343, 1-4, 2018
82018
Synthesis and Performance Optimization of a Switching Nano-crossbar Computer
D Alexandrescu, M Altun, L Anghel, A Bernasconi, V Ciriani, L Frontini, ...
82016
A XOR-based associative memory block in 28 nm CMOS for interdisciplinary applications
A Annovi, A Baschirotto, MM Beretta, NV Biesuz, S Citraro, F Crescioli, ...
2015 IEEE International Conference on Electronics, Circuits, and Systems …, 2015
82015
Development of a large pixel chip demonstrator in RD53 for ATLAS and CMS upgrades
E Conti, P Pangaud, P Breugnon, M Menichelli, G De Robertis, S Orfanelli, ...
PoS, 005, 2017
72017
A Hydrogenated amorphous silicon detector for Space Weather Applications
C Grimani, M Fabi, F Sabbatini, M Villani, L Antognini, A Bashiri, ...
Astrophysics and Space Science 368 (9), 78, 2023
62023
Testability of switching lattices in the stuck at fault model
A Bernasconi, V Ciriani, L Frontini
2018 IFIP/IEEE International Conference on Very Large Scale Integration …, 2018
62018
Design and characterization of new content addressable memory cells
A Annovi, L Frontini, V Liberali, A Stabile
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
62018
Enhancing logic synthesis of switching lattices by generalized Shannon decomposition methods
A Bernasconi, V Ciriani, L Frontini, V Liberali, G Trucco, T Villa
Microprocessors and Microsystems 56, 193-203, 2018
62018
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