A 9.6-mW/Ch 10-MHz wide-bandwidth electrical impedance tomography IC with accurate phase compensation for early breast cancer detection J Lee, S Gweon, K Lee, S Um, KR Lee, HJ Yoo
IEEE Journal of Solid-State Circuits 56 (3), 887-898, 2020
26 2020 A 36.2 dB High SNR and PVT/Leakage-Robust eDRAM Computing-In-Memory Macro With Segmented BL and Reference Cell Array S Ha, S Kim, D Han, S Um, HJ Yoo
IEEE Transactions on Circuits and Systems II: Express Briefs 69 (5), 2433-2437, 2022
18 2022 Neuro-CIM: A 310.4 TOPS/W Neuromorphic Computing-in-Memory Processor with Low WL/BL activity and Digital-Analog Mixed-mode Neuron Firing S Kim, S Kim, S Um, S Kim, K Kim, HJ Yoo
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022
15 2022 A 9.6 mW/Ch 10 MHz wide-bandwidth electrical impedance tomography IC with accurate phase compensation for breast cancer detection J Lee, S Gweon, K Lee, S Um, KR Lee, K Kim, J Lee, HJ Yoo
2020 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2020
9 2020 16.5 DynaPlasia: An eDRAM In-Memory-Computing-Based Reconfigurable Spatial Accelerator with Triple-Mode Cell for Dynamic Resource Switching S Kim, Z Li, S Um, W Jo, S Ha, J Lee, S Kim, D Han, HJ Yoo
2023 IEEE International Solid-State Circuits Conference (ISSCC), 256-258, 2023
7 2023 SNPU: Always-on 63.2 μW Face Recognition Spike Domain Convolutional Neural Network Processor with Spike Train Decomposition and Shift-and-Accumulation Unit S Kim, S Kim, S Um, S Kim, J Lee, HJ Yoo
2022 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2-4, 2022
5 2022 A 43.1 TOPS/W Energy-Efficient Absolute-Difference-Accumulation Operation Computing-In-Memory With Computation Reuse S Um, S Kim, S Kim, HJ Yoo
IEEE Transactions on Circuits and Systems II: Express Briefs 68 (5), 1605-1609, 2021
5 2021 DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell S Kim, Z Li, S Um, W Jo, S Ha, J Lee, S Kim, D Han, HJ Yoo
IEEE Journal of Solid-State Circuits, 2023
4 2023 Scaling-CIM: An eDRAM-based In-Memory-Computing Accelerator with Dynamic-Scaling ADC for SQNR-Boosting and Layer-wise Adaptive Bit-Truncation S Kim, S Um, W Jo, J Lee, S Ha, Z Li, HJ Yoo
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2023
3 2023 Neuro-CIM: ADC-Less Neuromorphic Computing-in-Memory Processor With Operation Gating/Stopping and Digital–Analog Networks S Kim, S Kim, S Um, S Kim, K Kim, HJ Yoo
IEEE Journal of Solid-State Circuits, 2023
3 2023 A Reconfigurable 1T1C eDRAM-based Spiking Neural Network Computing-In-Memory Processor for High System-Level Efficiency S Kim, S Kim, S Um, S Kim, Z Li, S Kim, W Jo, H Yoo
2023 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2023
2 2023 SNPU: An Energy-Efficient Spike Domain Deep-Neural-Network Processor With Two-Step Spike Encoding and Shift-and-Accumulation Unit S Kim, S Kim, S Um, S Kim, J Lee, HJ Yoo
IEEE Journal of Solid-State Circuits, 2023
2 2023 A 161.6 TOPS/W Mixed-mode Computing-in-Memory Processor for Energy-Efficient Mixed-Precision Deep Neural Networks W Jo, S Kim, J Lee, S Um, Z Li, HJ Yoo
2022 IEEE International Symposium on Circuits and Systems (ISCAS), 365-369, 2022
2 2022 Two-Step Spike Encoding Scheme and Architecture for Highly Sparse Spiking-Neural-Network S Kim, S Kim, S Um, S Kim, HJ Yoo
arXiv preprint arXiv:2202.03601, 2022
2 2022 Scaling-CIM: eDRAM In-Memory-Computing Accelerator With Dynamic-Scaling ADC and Adaptive Analog Operation S Kim, S Um, W Jo, J Lee, S Ha, Z Li, HJ Yoo
IEEE Journal of Solid-State Circuits, 2024
1 2024 A 3.8 mW 1.9 m Ω/√ Hz Electrical Impedance Tomography Imaging with 28.4 M Ω High Input Impedance and Loading Calibration S Um, J Lee, HJ Yoo
ESSCIRC 2023-IEEE 49th European Solid State Circuits Conference (ESSCIRC …, 2023
1 2023 A 332 TOPS/W Input/Weight-Parallel Computing-in-Memory Processor with Voltage-Capacitance-Ratio Cell and Time-Based ADC S Hong, S Um, S Kim, S Kim, W Jo, HJ Yoo
2023 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2023
1 2023 A 3.8-mW 1.9-m / Hz Electrical Impedance Tomography IC With High Input Impedance and Loading Effect Calibration for 3-D Early Breast Cancer Detect System S Um, J Lee, HJ Yoo
IEEE Journal of Solid-State Circuits, 2024
2024 NoPIM: Functional Network-on-Chip Architecture for Scalable High-Density Processing-in-Memory-based Accelerator S Kim, Z Li, S Um, W Jo, S Ha, S Kim, HJ Yoo
2024 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS), 1-3, 2024
2024 LOG-CIM: A 116.4 TOPS/W Digital Computing-In-Memory Processor Supporting a Wide Range of Logarithmic Quantization with Zero-Aware 6T Dual-WL Cell S Um, S Kim, S Hong, S Kim, HJ Yoo
2023 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-3, 2023
2023