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Sergey Gribok
Sergey Gribok
Intel PSG
Verified email at intel.com
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Cited by
Year
Beyond Peak Performance: Comparing the Real Performance of AI-Optimized FPGAs and GPUs
A Boutros, E Nurvitadhi, R Ma, S Gribok, Z Zhao, JC Hoe, V Betz, ...
2020 International Conference on Field-Programmable Technology (ICFPT), 2020
69*2020
Why compete when you can work together: FPGA-ASIC integration for persistent RNNs
E Nurvitadhi, D Kwon, A Jafari, A Boutros, J Sim, P Tomson, H Sumbul, ...
2019 IEEE 27th Annual International Symposium on Field-Programmable Custom …, 2019
662019
Stratix 10 NX architecture and applications
M Langhammer, E Nurvitadhi, B Pasca, S Gribok
The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays …, 2021
422021
Clock network fishbone architecture for a structured ASIC manufactured on a 28 NM CMOS process lithographic node
A Andreev, A Nikishin, S Gribok, PC Tan, CH Choo
US Patent 8,629,548, 2014
292014
Digitally Controlled Delay Line for a Structured ASIC Having a Via Configurable Fabric for High-Speed Interface
A Andreev, S Gribok, M Serban, M Verita, KW Sim, KH Lew
US Patent App. 13/649,584, 2014
242014
Extracting INT8 multipliers from INT18 multipliers
M Langhammer, B Pasca, G Baeckler, S Gribok
2019 29th International Conference on Field Programmable Logic and …, 2019
232019
Low complexity LDPC encoding algorithm
S Gribok, A Andreev, I Vikhliantsev
US Patent 7,913,149, 2011
172011
Via-configurable high-performance logic block involving transistor chains
A Andreev, S Gribok, RL Scepanovic, PC Tan, CW Kung
US Patent 8,957,398, 2015
142015
Fractal synthesis: Invited tutorial
M Langhammer, G Baeckler, S Gribok
Proceedings of the 2019 ACM/SIGDA International Symposium on Field …, 2019
13*2019
MEMS-based switching
H Schmit, S Gribok
US Patent 8,436,700, 2013
132013
Parallel LDPC decoder
A Andreev, I Vikhliantsev, S Gribok
US Patent 7,934,139, 2011
132011
High density 8-bit multiplier systolic arrays for FPGA
M Langhammer, S Gribok, G Baeckler
2020 IEEE 28th Annual International Symposium on Field-Programmable Custom …, 2020
122020
RRAM memory error emulation
AE Andreev, V Vukovic, S Gribok
US Patent 7,493,519, 2009
122009
Systems and methods for pipelined analog to digital conversion
S Gribok, C Ito, W Loh, E Chmelar
US Patent 7,656,340, 2010
112010
Об одном базисе для схем из клеточных элементов
СВ Грибок
Вестник Московского Университета, сер 15, 36-39, 1999
11*1999
Spiderweb-high performance FPGA NoC
M Langhammer, G Baeckler, S Gribok
2020 IEEE International Parallel and Distributed Processing Symposium …, 2020
102020
High performance regularized network-on-chip architecture
GW Baeckler, M Langhammer, SV Gribok
US Patent 10,922,471, 2021
92021
Об одной модели рекурсивных схем из функциональных элементов
СВ Грибок
Вестн. Моск. ун-та. Сер. 15. Вычисл. матем. и киберн, 31, 2002
8*2002
FPGA-based AI smart NICs for scalable distributed AI training systems
R Ma, E Georganas, A Heinecke, S Gribok, A Boutros, E Nurvitadhi
IEEE Computer Architecture Letters 21 (2), 49-52, 2022
72022
Memory BISR architecture for a slice
AE Andreev, SV Gribok, AA Bolotov
US Patent 7,430,694, 2008
72008
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