| A survey of digital circuit testing in the light of machine learning M Pradhan, BB Bhattacharya Wiley Interdisciplinary Reviews: Data Mining and Knowledge Discovery, e1360, 2020 | 28 | 2020 |
| Predicting X-Sensitivity of Circuit-Inputs on Test-Coverage: A Machine-Learning Approach M Pradhan, BB Bhattacharya, K Chakrabarty, BB Bhattacharya IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018 | 16 | 2018 |
| Optimizing test time for core-based 3-d integrated circuits by a technique of bi-partitioning M Pradhan, DK Das, C Giri, H Rahaman Design & Test Symposium (EWDTS), 2014 East-West, 1-4, 2014 | 8 | 2014 |
| COMEDI: Combinatorial Election of Diagnostic Vectors From Detection Test Sets for Logic Circuits M Pradhan, BB Bhattacharya IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (4 …, 2017 | 6 | 2017 |
| Optimal stacking of SOCs in a 3D-SIC for post-bond testing M Pradhan, C Giri, H Rahaman, DK Das 3D Systems Integration Conference (3DIC), 2013 IEEE International, 1-5, 2013 | 6 | 2013 |
| Fault Coverage of a Test Set on Structure-Preserving Siblings of a Circuit-Under-Test MN Mondal, AB Chowdhury, M Pradhan, S Sur-Kolay, BB Bhattacharya 2019 IEEE 28th Asian Test Symposium (ATS), 25-255, 2019 | 2 | 2019 |
| A Prufer-Sequence Based Representation of Large Graphs for Structural Encoding of Logic Networks M Pradhan, BB Bhattacharya Proceedings of the ACM India Joint International Conference on Data Science …, 2019 | 2 | 2019 |
| Text Architecture Optimisation in 3D Integrated Circuit M Pradhan | | 2013 |
