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A 10-bit 100-MS/s reference-free SAR ADC in 90 nm CMOS
Y Zhu, CH Chan, UF Chio, SW Sin, S.-P. U, RP Martins, and F. Maloberti
IEEE J. Solid-State Circuits 45 (6), 1111-1121, 2010
6572010
An 8-b 400-MS/s 2-b-per-cycle SAR ADC with resistive DAC
H Wei, CH Chan, UF Chio, SW Sin, U Seng-Pan, RP Martins, F Maloberti
IEEE Journal of Solid-State Circuits 47 (11), 2763-2772, 2012
1022012
A 0.024mm2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS
H Wei, CH Chan, UF Chio, SW Sin, U Seng-Pan, R Martins, F Maloberti
2011 IEEE International Solid-State Circuits Conference, 188-190, 2011
892011
A reconfigurable low-noise dynamic comparator with offset calibration in 90nm CMOS
CH Chan, Y Zhu, UF Chio, SW Sin, U Seng-Pan, RP Martins
IEEE Asian Solid-State Circuits Conference 2011, 233-236, 2011
742011
A 3.8 mW 8b 1GS/s 2b/cycle interleaving SAR ADC with compact DAC structure
CH Chan, Y Zhu, SW Sin, U Seng-Pan, RP Martins
2012 Symposium on VLSI Circuits (VLSIC), 86-87, 2012
702012
Split-SAR ADCs: Improved linearity with power and speed optimization
Y Zhu, CH Chan, UF Chio, SW Sin, U Seng-Pan, RP Martins, F Maloberti
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (2), 372-383, 2013
672013
26.5 A 5.5 mW 6b 5GS/S 4ื-lnterleaved 3b/cycle SAR ADC in 65nm CMOS
CH Chan, Y Zhu, SW Sin, U Seng-Pan, RP Martins
2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015
552015
A two-way interleaved 7-b 2.4-GS/s 1-then-2 b/cycle SAR ADC with background offset calibration
CH Chan, Y Zhu, WH Zhang, U Seng-Pan, RP Martins
IEEE Journal of Solid-State Circuits 53 (3), 850-860, 2018
472018
A 0.6-V 13-bit 20-MS/s two-step TDC-assisted SAR ADC with PVT tracking and speed-enhanced techniques
M Zhang, CH Chan, Y Zhu, RP Martins
IEEE Journal of Solid-State Circuits 54 (12), 3396-3409, 2019
382019
An 11b 450 MS/s three-way time-interleaved subranging pipelined-SAR ADC in 65 nm CMOS
Y Zhu, CH Chan, U Seng-Pan, RP Martins
IEEE Journal of Solid-State Circuits 51 (5), 1223-1234, 2016
372016
A 50-fJ 10-b 160-MS/s pipelined-SAR ADC decoupled flip-around MDAC and self-embedded offset cancellation
Y Zhu, CH Chan, SW Sin, U Seng-Pan, RP Martins, F Maloberti
IEEE journal of solid-state circuits 47 (11), 2614-2626, 2012
372012
A 34fJ 10b 500 MS/s partial-interleaving pipelined SAR ADC
Y Zhu, CH Chan, SW Sin, U Seng-Pan, RP Martins
2012 Symposium on VLSI Circuits (VLSIC), 90-91, 2012
362012
60-dB SNDR 100-MS/s SAR ADCs with threshold reconfigurable reference error calibration
CH Chan, Y Zhu, C Li, WH Zhang, IM Ho, L Wei, U Seng-Pan, RP Martins
IEEE Journal of Solid-State Circuits 52 (10), 2576-2588, 2017
352017
A 7.8-mW 5-b 5-GS/s dual-edges-triggered time-based flash ADC
CH Chan, Y Zhu, SW Sin, U Seng-Pan, RP Martins, F Maloberti
IEEE Transactions on Circuits and Systems I: Regular Papers 64 (8), 1966-1976, 2017
352017
A 6 b 5 GS/s 4 interleaved 3 b/cycle SAR ADC
CH Chan, Y Zhu, SW Sin, RP Martins
IEEE Journal of Solid-State Circuits 51 (2), 365-377, 2015
352015
A 35 fJ 10b 160 MS/s pipelined-SAR ADC with decoupled flip-around MDAC and self-embedded offset cancellation
Y Zhu, CH Chan, SW Sin, U Seng-Pan, RP Martins, F Maloberti
IEEE Asian Solid-State Circuits Conference 2011, 61-64, 2011
312011
16.4 A 5mW 7b 2.4 GS/s 1-then-2b/cycle SAR ADC with background offset calibration
CH Chan, Y Zhu, IM Ho, WH Zhang, U Seng-Pan, RP Martins
2017 IEEE International Solid-State Circuits Conference (ISSCC), 282-283, 2017
302017
A 12b 180MS/s 0.068mm2 With Full-Calibration-Integrated Pipelined-SAR ADC
J Zhong, Y Zhu, CH Chan, SW Sin, U Seng-Pan, RP Martins
IEEE Transactions on Circuits and Systems I: Regular Papers 64 (7), 1684-1695, 2017
292017
3.2 A 7.6 mW 1GS/s 60dB SNDR single-channel SAR-assisted pipelined ADC with temperature-compensated dynamic Gm-R-based amplifier
W Jiang, Y Zhu, M Zhang, CH Chan, RP Martins
2019 IEEE International Solid-State Circuits Conference-(ISSCC), 60-62, 2019
272019
Active–Passive Modulator for High-Resolution and Low-Power Applications
A Hussain, SW Sin, CH Chan, F Maloberti, RP Martins
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (1), 364-374, 2016
272016
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