Residue number systems: A new paradigm to datapath optimization for low-power and high-performance digital signal processing applications CH Chang, AS Molahosseini, AAE Zarandi, TF Tay
IEEE circuits and systems magazine 15 (4), 26-44, 2015
176 2015 Research challenges in next-generation residue number system architectures AS Molahosseini, S Sorouri, AAE Zarandi
2012 7th international conference on computer science & education (ICCSE …, 2012
70 2012 Reverse converter design via parallel-prefix adders: Novel components, methodology, and implementations AAE Zarandi, AS Molahosseini, M Hosseinzadeh, S Sorouri, S Antao, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (2), 374-378, 2014
41 2014 Efficient modular adder designs based on thermometer and one-hot coding F Jafarzadehpour, AS Molahosseini, AAE Zarandi, L Sousa
IEEE transactions on very large scale integration (VLSI) systems 27 (9 …, 2019
27 2019 An efficient inexact full adder cell design in CNFET technology with high-PSNR for image processing R Ataie, AA Emrani Zarandi, Y Safaei Mehrabani
International Journal of Electronics 106 (6), 928-944, 2019
25 2019 A multifunctional unit for designing efficient RNS-based datapaths AS Molahosseini, AAE Zarandi, P Martins, L Sousa
IEEE Access 5, 25972-25986, 2017
25 2017 MSDP with ACO: A maximal SRLG disjoint routing algorithm based on ant colony optimization MJ Rostami, AAE Zarandi, SM Hoseininasab
Journal of Network and Computer Applications 35 (1), 394-402, 2012
20 2012 New energy‐efficient hybrid wide‐operand adder architecture F Jafarzadehpour, AS Molahosseini, AA Emrani Zarandi, L Sousa
IET Circuits, Devices & Systems 13 (8), 1221-1231, 2019
18 2019 An Efficient Component for Designing Signed Reverse Converters for a Class of RNS Moduli Sets of Composite Form AAE Zarandi, AS Molahosseini, L Sousa, M Hosseinzadeh
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (1), 48-59, 2016
14 2016 Towards efficient modular adders based on reversible circuits AS Molahosseini, A Asadpoor, AAE Zarandi, L Sousa
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
13 2018 Modern Residue Number System Moduli Sets: Efficiency vs. Complexity A Zarandi, A Molahosseini, M Hosseinzadeh
Journal Neurocomputers 9, 2014
7 2014 Multifunctional unit for reverse conversion and sign detection based on five-moduli set {2 2n, 2 n+ 1, 2 n− 1, 2 n+ 3, 2 n− 3} M Mojahed, AS Molahosseini, AAE Zarandi
Computer Science 22, 101-121, 2021
5 2021 A modified continuous-time Markov chain, for the prioritized spectrum access over cognitive radio ad-hoc networks S Pashmforoush, AA Emrani Zarandi
International Journal of Electronics 108 (9), 1519-1533, 2021
4 2021 Variable latency carry speculative adders with input-based dynamic configuration H Ghabeli, AS Molahosseini, AAE Zarandi, L Sousa
Computers & Electrical Engineering 93, 107247, 2021
4 2021 New method for congestion control in wireless sensor network using neural network H Mollaei, AAE Zarandi
QUID: Investigación, Ciencia y Tecnología, 1085-1093, 2017
4 2017 RNS applications in computer networks AAE Zarandi
Embedded Systems Design with Special Arithmetic and Number Systems, 369-380, 2017
3 2017 Reverse Converter Design via Parallel-Prefix Adders: Novel Components AAE Zarandi, AS Molahosseini, M Hosseinzadeh, S Sorouri, S Antão, ...
Methodology, and Implementations‖ in IEEE Trans. on VLSI SYSTEMS, 2014
3 2014 Low-precision floating-point formats: From general-purpose to application-specific A Sabbagh Molahosseini, L Sousa, AA Emrani Zarandi, ...
Approximate Computing, 77-98, 2012
3 2012 ASIC and FPGA implementations of modern 4-moduli RNS reverse converters using distinct configurations AAE Zarandi, AS Molahosseini, L Sousa
Inst. Engenharia Sistemas Computadores, Lisbon, Portugal, INESC-ID Tech. Rep 8, 2015
2 2015 uLog: a software-based approximate logarithmic number system for computations on SIMD processors S Jahanshahi, AS Molahosseini, AAE Zarandi
The Journal of Supercomputing 79 (2), 1750-1783, 2023
1 2023