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Mohammadreza soltaniyeh
Mohammadreza soltaniyeh
Verified email at cs.rutgers.edu - Homepage
Title
Cited by
Cited by
Year
An accelerator for sparse convolutional neural networks leveraging systolic general matrix-matrix multiplication
M Soltaniyeh, RP Martin, S Nagarakatte
ACM Transactions on Architecture and Code Optimization (TACO) 19 (3), 1-26, 2022
142022
Synergistic CPU-FPGA acceleration of sparse linear algebra
M Soltaniyeh, RP Martin, S Nagarakatte
arXiv preprint arXiv:2004.13907, 2020
132020
Quota setting router architecture for quality of service in GALS NoC
K Cheshmi, J Trajkovic, M Soltaniyeh, S Mohammadi
2013 International Symposium on Rapid System Prototyping (RSP), 44-50, 2013
132013
Near-storage processing for solid state drive based recommendation inference with smartssds®
M Soltaniyeh, V Lagrange Moutinho Dos Reis, M Bryson, X Yao, ...
Proceedings of the 2022 ACM/SPEC on International Conference on Performance …, 2022
82022
Classifying data blocks at subpage granularity with an on-chip page table to improve coherence in tiled cmps
M Soltaniyeh, I Kadayif, O Ozturk
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
72017
Near-storage acceleration of database query processing with SmartSSDs
M Soltaniyeh, VLM Dos Reis, M Bryson, R Martin, S Nagarakatte
2021 IEEE 29th Annual International Symposium on Field-Programmable Custom …, 2021
52021
SPOTS: An accelerator for sparse CNNs leveraging general matrix-matrix multiplication
M Soltaniyeh, RP Martin, S Nagarakatte
arXiv preprint arXiv:2107.13386, 2021
32021
Boosting performance of directory-based cache coherence protocols with coherence bypass at subpage granularity and a novel on-chip page table
M Soltaniyeh, I Kadayif, O Ozturk
Proceedings of the ACM International Conference on Computing Frontiers, 180-187, 2016
22016
SPOTS: An Accelerator for Sparse Convolutional Networks Leveraging Systolic General Matrix-Matrix Multiplication
M Soltaniyeh, RP Martin, S Nagarakatte
arXiv preprint arXiv:2107.13386, 2021
12021
METHODS AND SYSTEM FOR IMPORTING DATA TO A GRAPH DATABASE USING NEAR-STORAGE PROCESSING
S Kang, M Soltaniyeh, X Yao
US Patent App. 18/456,955, 2024
2024
Convolutional neural network accelerator hardware
S Nagarakatte, RP Martin, M Soltaniyeh
US Patent App. 18/198,579, 2023
2023
Systems and methods for near-storage processing in solid state drives
M Soltaniyeh, VLM DOS REIS, M Bryson, X Yao
US Patent App. 17/568,714, 2023
2023
Hardware-Software Techniques for Accelerating Sparse Computation
M Soltaniyeh
Rutgers The State University of New Jersey, School of Graduate Studies, 2022
2022
Boosting performance of directory-based cache coherence protocols by detecting private memory blocks at subpage granularity and using a low cost on-chip page table
MR Soltaniyeh
PQDT-Global, 2015
2015
A Scalable Cache Coherence Scheme for Large-Scale Chip Multiprocessor
M Soltaniyeh
ASPLOS SRC, 2015
2015
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