Barrier layer for FinFET channels RK Oxland, M Van Dal, MC Holland, G Vellianitis, M Passlack
US Patent 9,214,555, 2015
556 2015 Nanowire field effect transistor device having a replacement gate RK Oxland
US Patent 9,472,618, 2016
377 2016 Demonstration of scaled Ge p-channel FinFETs integrated on Si MJH Van Dal, G Vellianitis, G Doornbos, B Duriez, TM Shen, CC Wu, ...
2012 International Electron Devices Meeting, 23.5. 1-23.5. 4, 2012
85 2012 An ultralow-resistance ultrashallow metallic source/drain contact scheme for III–V NMOS R Oxland, SW Chang, X Li, SW Wang, G Radhakrishnan, W Priyantha, ...
IEEE electron device letters 33 (4), 501-503, 2012
60 2012 Scaled p-channel Ge FinFET with optimized gate stack and record performance integrated on 300mm Si wafers B Duriez, G Vellianitis, MJH Van Dal, G Doornbos, R Oxland, ...
2013 IEEE International Electron Devices Meeting, 20.1. 1-20.1. 4, 2013
58 2013 InAs N-MOSFETs with record performance of Ion = 600 μA/μm at Ioff = 100 nA/μm (Vd = 0.5 V) SW Chang, X Li, R Oxland, SW Wang, CH Wang, R Contreras-Guerrero, ...
2013 IEEE International Electron Devices Meeting, 16.1. 1-16.1. 4, 2013
47 2013 Vertical CMOS structure and method RK Oxland
US Patent 9,472,551, 2016
44 2016 InAs hole inversion and bandgap interface state density of 2× 1011 cm− 2 eV− 1 at HfO2/InAs interfaces CH Wang, SW Wang, G Doornbos, G Astromskas, K Bhuwalka, ...
Applied Physics Letters 103 (14), 2013
38 2013 Ge n-channel FinFET with optimized gate stack and contacts MJH Van Dal, B Duriez, G Vellianitis, G Doornbos, R Oxland, M Holland, ...
2014 IEEE International Electron Devices Meeting, 9.5. 1-9.5. 4, 2014
37 2014 Surface passivation of AlN/GaN MOS-HEMTs using ultra-thin Al2O3 formed by thermal oxidation of evaporated aluminium S Taking, A Banerjee, H Zhou, X Li, AZ Khokhar, R Oxland, I McGregor, ...
Electronics letters 46 (4), 301-302, 2010
31 2010 FinFET with channel backside passivation layer device and method G Doornbos, M Van Dal, G Vellianitis, B Duriez, KK Bhuwalka, RK Oxland, ...
US Patent 9,412,871, 2016
27 2016 InAs FinFETs With Hfin = 20 nm Fabricated Using a Top–Down Etch Process R Oxland, SWC Li, SW Wang, T Vasen, R P., R Contreras-Guerrero, ...
IEEE Electron Device Letters 37 (3), 261-264, 2016
26 2016 Method for forming a nanowire field effect transistor device having a replacement gate RK Oxland
US Patent 9,136,332, 2015
26 2015 InAs N-MOSFETs with record performance of Ion= 600 µA/µm at Ioff= 100 nA/µm (Vd= 0.5 V) SW Chang, X Li, R Oxland, SW Wang, CH Wang, R Contreras-Guerrero, ...
Proceedings of Technical Digest of the IEEE International Electron Devices …, 2013
23 2013 FinFET with a buried semiconductor material between two fins G Vellianitis, M Van Dal, B Duriez, R Oxland
US Patent 8,987,835, 2015
22 2015 High-Performance InAs Gate-All-Around Nanowire MOSFETs on 300 mm Si Substrates G Doornbos, M Holland, G Vellianitis, MJHV Dal, B Duriez, R Oxland, ...
Journal of the Electron Devices Society 4 (5), 253-259, 2016
20 2016 Methods of forming semiconductor devices and FinFET devices, and FinFET devices MC Holland, M Passlack, RK Oxland
US Patent 9,355,920, 2016
19 2016 High-k dielectrics on (100) and (110) n-InAs: Physical and electrical characterizations CH Wang, G Doornbos, G Astromskas, G Vellianitis, R Oxland, ...
AIP Advances 4 (4), 2014
19 2014 Field-Effect Mobility of InAs Surface Channel nMOSFET With Low Scaled Gate-Stack SW Wang, T Vasen, G Doornbos, R Oxland, SW Chang, X Li, ...
IEEE Transactions on Electron Devices 62 (8), 2429-2436, 2015
17 2015 Iii-v compound semiconductor device having dopant layer and method of making the same RK Oxland, M Van Dal
US Patent App. 13/467,133, 2013
17 2013