jean-luc Dekeyser
jean-luc Dekeyser
professor computer science
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A model-driven design framework for massively parallel embedded systems
A Gamatié, S Le Beux, É Piel, R Ben Atitallah, A Etien, P Marquet, ...
ACM Transactions on Embedded Computing Systems (TECS) 10 (4), 1-36, 2011
Data-parallel load balancing strategies
C Fonlupt, P Marquet, JL Dekeyser
Parallel Computing 24 (11), 1665-1684, 1998
Gaspard2: from MARTE to SystemC simulation
É Piel, RB Atitallah, P Marquet, S Meftali, S Niar, A Etien, JL Dekeyser, ...
proc. of the DATE 8, 2008
MDA for SoC Design, Intensive Signal Processing Experiment.
P Boulet, JL Dekeyser, C Dumoulin, P Marquet
FDL, 309-317, 2003
Estimating energy consumption for an MPSoC architectural exploration
RB Atitallah, S Niar, A Greiner, S Meftali, JL Dekeyser
Architecture of Computing Systems-ARCS 2006: 19th International Conference …, 2006
An MPSoC performance estimation framework using transaction level modeling
RB Atitallah, S Niar, S Meftali, JL Dekeyser
13th IEEE International Conference on Embedded and Real-Time Computing …, 2007
An MDE approach for automatic code generation from UML/MARTE to OpenCL
AWO Rodrigues, F Guyomarc'h, JL Dekeyser
Computing in Science & Engineering 15 (1), 46-55, 2012
MPSoC power estimation framework at transaction level modeling
RB Atitallah, S Niar, JL Dekeyser
2007 Internatonal Conference on Microelectronics, 245-248, 2007
A model-driven approach for hybrid power estimation in embedded systems design
C Trabelsi, R Ben Atitallah, S Meftali, JL Dekeyser, A Jemai
EURASIP Journal on Embedded Systems 2011, 1-15, 2011
A model driven design framework for high performance embedded systems
A Gamatié, S Le Beux, É Piel, A Etien, RB Atitallah, P Marquet, ...
INRIA, 2008
Towards an automation of the mutation analysis dedicated to model transformation
V Aranega, JM Mottu, A Etien, T Degueule, B Baudry, JL Dekeyser
Software Testing, Verification and Reliability 25 (5-7), 653-683, 2015
Metamodels and MDA transformations for embedded systems
L Bondé, C Dumoulin, JL Dekeyser
Advances in Design and Specification Languages for SoCs: Selected …, 2005
Mode-automata based methodology for scade
O Labbani, JL Dekeyser, P Boulet
Hybrid Systems: Computation and Control: 8th International Workshop, HSCC …, 2005
Introducing control in the gaspard2 data-parallel metamodel: Synchronous approach
O Labbani, JL Dekeyser, P Boulet, É Rutten
International Workshop MARTES: Modeling and Analysis of Real-Time and …, 2005
Expressing embedded systems configurations at high abstraction levels with UML MARTE profile: Advantages, limitations and alternatives
IR Quadri, A Gamatié, P Boulet, S Meftali, JL Dekeyser
Journal of systems architecture 58 (5), 178-194, 2012
Targeting reconfigurable FPGA based SoCs using the UML MARTE profile: from high abstraction levels to code generation
IR Quadri, H Yu, A Gamatié, E Rutten, S Meftali, JL Dekeyser
International Journal of Embedded Systems 4 (3-4), 204-224, 2010
Model driven engineering for SoC co-design
J Dekeyser, P Boulet, P Marquet, S Meftali
The 3rd International IEEE-NEWCAS Conference, 2005., 21-25, 2005
MARTE: UML-based Hardware Design from Modelling to Simulation.
S Taha, A Radermacher, S Gérard, JL Dekeyser
FDL, 274-279, 2007
Hybrid system level power consumption estimation for fpga-based mpsoc
SK Rethinagiri, RB Atitallah, S Niar, E Senn, JL Dekeyser
2011 IEEE 29th International Conference on Computer Design (ICCD), 239-246, 2011
Multilevel MPSoC simulation using an MDE approach
RB Atitallah, E Piel, S Niar, P Marquet, JL Dekeyser
2007 IEEE International SOC Conference, 197-200, 2007
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