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Antonio L P Rotondaro
Antonio L P Rotondaro
Tokyo Electron America
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Application of HfSiON as a gate dielectric material
MR Visokay, JJ Chambers, ALP Rotondaro, A Shanware, L Colombo
Applied Physics Letters 80 (17), 3183-3185, 2002
5572002
Annealing of high-k dielectric materials
ALP Rotondaro, MR Visokay, L Colombo
US Patent 6,544,906, 2003
4852003
Bilayer deposition to avoid unwanted interfacial reactions during high K gate dielectric processing
MR Visokay, ALP Rotondaro, L Colombo
US Patent 6,696,332, 2004
2182004
Selective removal of TixNy
ALP Rotondaro
US Patent 5,948,702, 1999
1871999
35% drive current improvement from recessed-SiGe drain extensions on 37 nm gate length PMOS
PR Chidambaram, BA Smith, LH Hall, H Bu, S Chakravarthi, Y Kim, ...
Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004., 48-49, 2004
1532004
Advanced CMOS transistors with a novel HfSiON gate dielectric
ALP Rotondaro, MR Visokay, JJ Chambers, A Shanware, R Khamankar, ...
2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No …, 2002
1462002
Multiple work function gates
ALP Rotondaro, MR Visokay
US Patent 6,835,639, 2004
1382004
Gate structure and method
MR Visokay, ALP Rotondaro, L Colombo
US Patent 7,105,891, 2006
1352006
Gate dielectric and method
ALP Rotondaro, L Colombo, MJ Bevan
US Patent 6,919,251, 2005
1322005
High temperature interface layer growth for high-k gate dielectric
L Colombo, JJ Chambers, ALP Rotondaro, MR Visokay
US Patent 6,852,645, 2005
1212005
CMOS metal replacement gate transistors using tantalum pentoxide gate insulator
A Chatterjee, RA Chapman, K Joyner, M Otobe, S Hattangady, M Bevan, ...
International Electron Devices Meeting 1998. Technical Digest (Cat. No …, 1998
1161998
Characterization and comparison of the charge trapping in HfSiON and HfO2 gate dielectrics
A Shanware
Tech. Digest of IEDM, 2003, 2003
1132003
Sub-100 nm gate length metal gate NMOS transistors fabricated by a replacement gate process
A Chatterjee, RA Chapman, G Dixit, J Kuehne, S Hattangady, H Yang, ...
International Electron Devices Meeting. IEDM Technical Digest, 821-824, 1997
1131997
Anneal sequence for high-κ film property optimization
MR Visokay, L Colombo, ALP Rotondaro
US Patent 6,821,873, 2004
1102004
Gate structure and method
MM Eissa, ALP Rotondaro
US Patent 6,723,658, 2004
1092004
Reliability evaluation of HfSiON gate dielectric film with 12.8 A SiO2 equivalent thickness
A Shanware
Proceedings of IEDM Tech. Digest, 2001, 2001
1052001
Impact of Fe and Cu contamination on the minority carrier lifetime of silicon substrates
ALP Rotondaro, TQ Hurd, A Kaniava, J Vanhellemont, E Simoen, ...
Journal of the Electrochemical Society 143 (9), 3014, 1996
1011996
Method for fabricating transistor gate structures and gate dielectrics thereof
MR Visokay, L Colombo, JJ Chambers, ALP Rotondaro, H Bu
US Patent 7,135,361, 2006
982006
Gate structure and method
MR Visokay, ALP Rotondaro, L Colombo
US Patent 6,797,599, 2004
972004
Gate dielectric and method
MR Visokay, ALP Rotondaro, L Colombo
US Patent 7,018,902, 2006
932006
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